diff options
author | Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> | 2023-08-30 14:36:53 +0100 |
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committer | Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> | 2023-10-25 15:07:14 +0100 |
commit | fa05bd9ea226541e860789443b8f68f8d8846390 (patch) | |
tree | e63b0399f570e205112b27f7fd92b3d26cbb1a74 /tftf/tests | |
parent | 7e514f6a01af8af9e6f203b1406a3f5c3ea1f045 (diff) |
feat(sve): add helper routines to read, write, compare SVE registers
Add helper routines to read, write, write_rand and compare SVE
Z, P, FFR registers.
These helper routines can be called by testcases running in NS-EL2,
R-EL1, S-EL1 payload. The caller has to configure SVE vector length and
has to pass memory to read/write SVE registers.
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: I3fa064c76a498ee2348d92cba2544a6e50331e15
Diffstat (limited to 'tftf/tests')
-rw-r--r-- | tftf/tests/runtime_services/realm_payload/host_realm_payload_sve_tests.c | 20 | ||||
-rw-r--r-- | tftf/tests/runtime_services/secure_service/test_spm_cpu_features.c | 17 |
2 files changed, 13 insertions, 24 deletions
diff --git a/tftf/tests/runtime_services/realm_payload/host_realm_payload_sve_tests.c b/tftf/tests/runtime_services/realm_payload/host_realm_payload_sve_tests.c index 5e9d4fd..03de96a 100644 --- a/tftf/tests/runtime_services/realm_payload/host_realm_payload_sve_tests.c +++ b/tftf/tests/runtime_services/realm_payload/host_realm_payload_sve_tests.c @@ -472,8 +472,8 @@ rm_realm: test_result_t host_sve_realm_check_vectors_leaked(void) { u_register_t rmi_feat_reg0; - uint8_t *regs_base_wr, *regs_base_rd; test_result_t rc; + uint64_t bitmap; bool realm_rc; uint8_t sve_vq; @@ -520,17 +520,13 @@ test_result_t host_sve_realm_check_vectors_leaked(void) * be either 0 or the old values filled by NS world. * TODO: check if upper bits are zero */ - regs_base_wr = (uint8_t *)&ns_sve_z_regs_write; - regs_base_rd = (uint8_t *)&ns_sve_z_regs_read; - - rc = TEST_RESULT_SUCCESS; - for (int i = 0U; i < SVE_NUM_VECTORS; i++) { - if (memcmp(regs_base_wr + (i * SVE_VQ_TO_BYTES(sve_vq)), - regs_base_rd + (i * SVE_VQ_TO_BYTES(sve_vq)), - SVE_VQ_TO_BYTES(sve_vq)) != 0) { - ERROR("SVE Z%d mismatch\n", i); - rc = TEST_RESULT_FAIL; - } + bitmap = sve_z_regs_compare(&ns_sve_z_regs_write, &ns_sve_z_regs_read); + if (bitmap != 0UL) { + ERROR("SVE Z regs compare failed (bitmap: 0x%016llx)\n", + bitmap); + rc = TEST_RESULT_FAIL; + } else { + rc = TEST_RESULT_SUCCESS; } rm_realm: diff --git a/tftf/tests/runtime_services/secure_service/test_spm_cpu_features.c b/tftf/tests/runtime_services/secure_service/test_spm_cpu_features.c index bc3bb52..cfc931f 100644 --- a/tftf/tests/runtime_services/secure_service/test_spm_cpu_features.c +++ b/tftf/tests/runtime_services/secure_service/test_spm_cpu_features.c @@ -19,15 +19,6 @@ static const struct ffa_uuid expected_sp_uuids[] = { {PRIMARY_UUID} }; -static test_result_t fp_vector_compare(uint8_t *a, uint8_t *b, - size_t vector_size, uint8_t vectors_num) -{ - if (memcmp(a, b, vector_size * vectors_num) != 0) { - return TEST_RESULT_FAIL; - } - return TEST_RESULT_SUCCESS; -} - static sve_z_regs_t sve_vectors_input; static sve_z_regs_t sve_vectors_output; static int sve_op_1[NS_SVE_OP_ARRAYSIZE]; @@ -139,9 +130,11 @@ test_result_t test_sve_vectors_preserved(void) sve_z_regs_read(&sve_vectors_output); /* Compare to state before calling into secure world. */ - return fp_vector_compare((uint8_t *)sve_vectors_input, - (uint8_t *)sve_vectors_output, - vl, SVE_NUM_VECTORS); + if (sve_z_regs_compare(&sve_vectors_input, &sve_vectors_output) != 0UL) { + return TEST_RESULT_FAIL; + } + + return TEST_RESULT_SUCCESS; } /* |