diff options
| author | Sandrine Bailleux <sandrine.bailleux@arm.com> | 2020-02-27 08:48:44 +0000 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2020-02-27 08:48:44 +0000 |
| commit | 953347792146abb23ae3cc8ff291f1dc2f33a1a9 (patch) | |
| tree | 8d062e42c753e8e9ab7cab035ed1b1295f8dae92 /plat/arm/fvp | |
| parent | 74013057aa0f38f1d82a8acd884c0b23f837316f (diff) | |
| parent | 73e5cb494d3d49ba05ecb3fc9707544e29e50c89 (diff) | |
Merge changes from topic "gic_update"
* changes:
Max SPI INTID is 1019
Switch AARCH32/AARCH64 to __aarch64__
Diffstat (limited to 'plat/arm/fvp')
| -rw-r--r-- | plat/arm/fvp/fvp_mem_prot.c | 4 | ||||
| -rw-r--r-- | plat/arm/fvp/include/platform_def.h | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/plat/arm/fvp/fvp_mem_prot.c b/plat/arm/fvp/fvp_mem_prot.c index 6a7d651..2682ba9 100644 --- a/plat/arm/fvp/fvp_mem_prot.c +++ b/plat/arm/fvp/fvp_mem_prot.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, Arm Limited. All rights reserved. + * Copyright (c) 2018-2020, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -14,7 +14,7 @@ static const mem_region_t fvp_ram_ranges[] = { {NS_IMAGE_LIMIT, 1 << ONE_GB_SHIFT}, -#ifdef AARCH64 +#ifdef __aarch64__ {FVP_DRAM2_BASE, 1 << ONE_GB_SHIFT}, #endif }; diff --git a/plat/arm/fvp/include/platform_def.h b/plat/arm/fvp/include/platform_def.h index b6c926b..d5dc818 100644 --- a/plat/arm/fvp/include/platform_def.h +++ b/plat/arm/fvp/include/platform_def.h @@ -19,7 +19,7 @@ /******************************************************************************* * Platform binary types for linking ******************************************************************************/ -#ifndef AARCH32 +#ifdef __aarch64__ #define PLATFORM_LINKER_FORMAT "elf64-littleaarch64" #define PLATFORM_LINKER_ARCH aarch64 #else @@ -177,7 +177,7 @@ /******************************************************************************* * Platform specific page table and MMU setup constants ******************************************************************************/ -#if AARCH64 +#ifdef __aarch64__ #define PLAT_PHY_ADDR_SPACE_SIZE (ULL(1) << 34) #define PLAT_VIRT_ADDR_SPACE_SIZE (ULL(1) << 34) #else |