diff options
author | Alexei Fedorov <Alexei.Fedorov@arm.com> | 2019-10-29 14:06:54 +0000 |
---|---|---|
committer | Alexei Fedorov <Alexei.Fedorov@arm.com> | 2019-11-07 10:30:09 +0000 |
commit | 0f305470237c19a73979d558e740fb90f8449a59 (patch) | |
tree | 6aeedf76e1b3567e559b8ca88d84b1c0f0d013bb /plat/arm/fvp | |
parent | 2957ff7660eb3b14ed1ee7ade14218332410e3c0 (diff) |
TFTF: Add support for FVP platforms with SMT capabilities
This patch adds support for Simultaneously MultiThreaded (SMT)
cores on FVP models. Number of threads per CPU is passed in
FVP_MAX_PE_PER_CPU build parameter which can be set either to
1 or 2. This option defaults to 1.
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
Change-Id: Ib0e2afe429e8f24b8a74ad6ee98750ed1ac121fb
Diffstat (limited to 'plat/arm/fvp')
-rw-r--r-- | plat/arm/fvp/fvp_def.h | 2 | ||||
-rw-r--r-- | plat/arm/fvp/fvp_topology.c | 71 | ||||
-rw-r--r-- | plat/arm/fvp/platform.mk | 13 |
3 files changed, 48 insertions, 38 deletions
diff --git a/plat/arm/fvp/fvp_def.h b/plat/arm/fvp/fvp_def.h index abaa387..3f01678 100644 --- a/plat/arm/fvp/fvp_def.h +++ b/plat/arm/fvp/fvp_def.h @@ -19,8 +19,6 @@ #define FVP_MAX_CPUS_PER_CLUSTER 8 /* Currently the highest cluster count on the FVP is 4 (Quad cluster) */ #define FVP_CLUSTER_COUNT 4 -/* Currently multi-threaded CPUs only have a single thread */ -#define FVP_MAX_PE_PER_CPU 1 /******************************************************************************* * FVP memory map related constants diff --git a/plat/arm/fvp/fvp_topology.c b/plat/arm/fvp/fvp_topology.c index 751a1b8..dddd25b 100644 --- a/plat/arm/fvp/fvp_topology.c +++ b/plat/arm/fvp/fvp_topology.c @@ -17,46 +17,40 @@ #define PSYSR_OFF 0x10 #define PSYSR_INVALID 0xffffffff +#if FVP_MAX_PE_PER_CPU == 2 +/* SMT: 2 threads per CPU */ +#define CPU_DEF(cluster, cpu) \ + { cluster, cpu, 0 }, \ + { cluster, cpu, 1 } + +#else +#define CPU_DEF(cluster, cpu) \ + { cluster, cpu } +#endif + +/* 8 CPUs per cluster */ +#define CLUSTER_DEF(cluster) \ + CPU_DEF(cluster, 0), \ + CPU_DEF(cluster, 1), \ + CPU_DEF(cluster, 2), \ + CPU_DEF(cluster, 3), \ + CPU_DEF(cluster, 4), \ + CPU_DEF(cluster, 5), \ + CPU_DEF(cluster, 6), \ + CPU_DEF(cluster, 7) + static const struct { unsigned int cluster_id; unsigned int cpu_id; +#if FVP_MAX_PE_PER_CPU > 1 + unsigned int thread_id; +#endif } fvp_base_aemv8a_aemv8a_cores[] = { - /* Cluster 0 */ - { 0, 0 }, - { 0, 1 }, - { 0, 2 }, - { 0, 3 }, - { 0, 4 }, - { 0, 5 }, - { 0, 6 }, - { 0, 7 }, - /* Cluster 1 */ - { 1, 0 }, - { 1, 1 }, - { 1, 2 }, - { 1, 3 }, - { 1, 4 }, - { 1, 5 }, - { 1, 6 }, - { 1, 7 }, - /* Cluster 2 */ - { 2, 0 }, - { 2, 1 }, - { 2, 2 }, - { 2, 3 }, - { 2, 4 }, - { 2, 5 }, - { 2, 6 }, - { 2, 7 }, - /* Cluster 3 */ - { 3, 0 }, - { 3, 1 }, - { 3, 2 }, - { 3, 3 }, - { 3, 4 }, - { 3, 5 }, - { 3, 6 }, - { 3, 7 }, + /* Clusters 0...3 */ + CLUSTER_DEF(0), + CLUSTER_DEF(1), + CLUSTER_DEF(2), + CLUSTER_DEF(3) }; /* @@ -105,7 +99,12 @@ uint64_t tftf_plat_get_mpidr(unsigned int core_pos) mpid = make_mpid( fvp_base_aemv8a_aemv8a_cores[core_pos].cluster_id, +#if FVP_MAX_PE_PER_CPU > 1 + fvp_base_aemv8a_aemv8a_cores[core_pos].cpu_id, + fvp_base_aemv8a_aemv8a_cores[core_pos].thread_id); +#else fvp_base_aemv8a_aemv8a_cores[core_pos].cpu_id); +#endif if (fvp_pwrc_read_psysr(mpid) != PSYSR_INVALID) return mpid; diff --git a/plat/arm/fvp/platform.mk b/plat/arm/fvp/platform.mk index c014d6d..27874e2 100644 --- a/plat/arm/fvp/platform.mk +++ b/plat/arm/fvp/platform.mk @@ -4,6 +4,19 @@ # SPDX-License-Identifier: BSD-3-Clause # +# Default number of threads per CPU on FVP +FVP_MAX_PE_PER_CPU := 1 + +# Check the PE per core count +ifneq ($(FVP_MAX_PE_PER_CPU),$(filter $(FVP_MAX_PE_PER_CPU),1 2)) +$(error "Incorrect FVP_MAX_PE_PER_CPU specified for FVP port") +endif + +# Pass FVP_MAX_PE_PER_CPU to the build system +$(eval $(call add_define,TFTF_DEFINES,FVP_MAX_PE_PER_CPU)) +$(eval $(call add_define,NS_BL1U_DEFINES,FVP_MAX_PE_PER_CPU)) +$(eval $(call add_define,NS_BL2U_DEFINES,FVP_MAX_PE_PER_CPU)) + PLAT_INCLUDES := -Iplat/arm/fvp/include/ PLAT_SOURCES := drivers/arm/gic/arm_gic_v2v3.c \ |