diff options
| author | Sandrine Bailleux <sandrine.bailleux@arm.com> | 2019-01-11 19:01:22 +0100 |
|---|---|---|
| committer | Sandrine Bailleux <sandrine.bailleux@arm.com> | 2019-01-14 13:51:17 +0100 |
| commit | 80ddcc3286b61f40015b30296a47baf47c3e8fd0 (patch) | |
| tree | 5c637376f646956d84c1dc9759f85acef36c1e2c /lib | |
| parent | 8b170a247ef0d45d0186cdc8b22257a9ee1f2a3f (diff) | |
Improve readability of exceptions stubs code
Change-Id: Ic9b90d7284b0bbde85fe3e31a025aab40360de03
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/aarch64/exception_stubs.S | 56 |
1 files changed, 23 insertions, 33 deletions
diff --git a/lib/aarch64/exception_stubs.S b/lib/aarch64/exception_stubs.S index 0508fe5..ba31927 100644 --- a/lib/aarch64/exception_stubs.S +++ b/lib/aarch64/exception_stubs.S @@ -6,41 +6,31 @@ #include <asm_macros.S> + .global exception_stubs + /* * Simplistic exceptions vector table. * All entries spin, which means all types of exceptions are unrecoverable. */ - .global exception_stubs + .macro vector_entry_spin name + vector_entry \name + b \name + .endm + vector_base exception_stubs -vector_entry SynchronousExceptionSP0 - b . -vector_entry IrqSP0 - b . -vector_entry FiqSP0 - b . -vector_entry SErrorSP0 - b . -vector_entry SynchronousExceptionSPx - b . -vector_entry IrqSPx - b . -vector_entry FiqSPx - b . -vector_entry SErrorSPx - b . -vector_entry SynchronousExceptionA64 - b . -vector_entry IrqA64 - b . -vector_entry FiqA64 - b . -vector_entry SErrorA64 - b . -vector_entry SynchronousExceptionA32 - b . -vector_entry IrqA32 - b . -vector_entry FiqA32 - b . -vector_entry SErrorA32 - b . +vector_entry_spin SynchronousExceptionSP0 +vector_entry_spin IrqSP0 +vector_entry_spin FiqSP0 +vector_entry_spin SErrorSP0 +vector_entry_spin SynchronousExceptionSPx +vector_entry_spin IrqSPx +vector_entry_spin FiqSPx +vector_entry_spin SErrorSPx +vector_entry_spin SynchronousExceptionA64 +vector_entry_spin IrqA64 +vector_entry_spin FiqA64 +vector_entry_spin SErrorA64 +vector_entry_spin SynchronousExceptionA32 +vector_entry_spin IrqA32 +vector_entry_spin FiqA32 +vector_entry_spin SErrorA32 |