diff options
author | Antonio Nino Diaz <antonio.ninodiaz@arm.com> | 2019-02-11 15:34:32 +0000 |
---|---|---|
committer | Antonio Nino Diaz <antonio.ninodiaz@arm.com> | 2019-02-11 15:34:32 +0000 |
commit | ffdfd16fd8cdedeec558749a416759cc58208b37 (patch) | |
tree | 723e7d461bd8d164d2ad708c054fb63f44c1eeb7 /include | |
parent | 418ca0c3505885eeca960fdf91f51cdd507c8764 (diff) |
Synchronize files with TF-A repository
Change-Id: Ieb56d0639efd29c2695751b2b36cc98ce2c90dab
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/lib/aarch32/arch.h | 2 | ||||
-rw-r--r-- | include/lib/aarch32/arch_features.h | 6 | ||||
-rw-r--r-- | include/lib/aarch64/arch.h | 5 | ||||
-rw-r--r-- | include/lib/aarch64/arch_features.h | 12 | ||||
-rw-r--r-- | include/lib/aarch64/arch_helpers.h | 1 | ||||
-rw-r--r-- | include/lib/xlat_tables/aarch32/xlat_tables_aarch32.h | 3 | ||||
-rw-r--r-- | include/lib/xlat_tables/aarch64/xlat_tables_aarch64.h | 29 | ||||
-rw-r--r-- | include/lib/xlat_tables/xlat_tables_arch.h | 12 | ||||
-rw-r--r-- | include/lib/xlat_tables/xlat_tables_v2.h | 11 | ||||
-rw-r--r-- | include/lib/xlat_tables/xlat_tables_v2_helpers.h | 3 |
10 files changed, 59 insertions, 25 deletions
diff --git a/include/lib/aarch32/arch.h b/include/lib/aarch32/arch.h index 9b46601..14b1080 100644 --- a/include/lib/aarch32/arch.h +++ b/include/lib/aarch32/arch.h @@ -114,6 +114,8 @@ #define ID_PFR1_VIRTEXT_MASK U(0xf) #define GET_VIRT_EXT(id) (((id) >> ID_PFR1_VIRTEXT_SHIFT) \ & ID_PFR1_VIRTEXT_MASK) +#define ID_PFR1_GENTIMER_SHIFT U(16) +#define ID_PFR1_GENTIMER_MASK U(0xf) #define ID_PFR1_GIC_SHIFT U(28) #define ID_PFR1_GIC_MASK U(0xf) diff --git a/include/lib/aarch32/arch_features.h b/include/lib/aarch32/arch_features.h index d934102..ddf0968 100644 --- a/include/lib/aarch32/arch_features.h +++ b/include/lib/aarch32/arch_features.h @@ -11,6 +11,12 @@ #include <arch_helpers.h> +static inline bool is_armv7_gentimer_present(void) +{ + return ((read_id_pfr1() >> ID_PFR1_GENTIMER_SHIFT) & + ID_PFR1_GENTIMER_MASK) != 0U; +} + static inline bool is_armv8_2_ttcnp_present(void) { return ((read_id_mmfr4() >> ID_MMFR4_CNP_SHIFT) & diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h index 07661c9..39b2a42 100644 --- a/include/lib/aarch64/arch.h +++ b/include/lib/aarch64/arch.h @@ -204,6 +204,10 @@ /* ID_AA64MMFR2_EL1 definitions */ #define ID_AA64MMFR2_EL1 S3_0_C0_C7_2 + +#define ID_AA64MMFR2_EL1_ST_SHIFT U(28) +#define ID_AA64MMFR2_EL1_ST_MASK ULL(0xf) + #define ID_AA64MMFR2_EL1_CNP_SHIFT U(0) #define ID_AA64MMFR2_EL1_CNP_MASK ULL(0xf) @@ -427,6 +431,7 @@ #define TCR_TxSZ_MIN ULL(16) #define TCR_TxSZ_MAX ULL(39) +#define TCR_TxSZ_MAX_TTST ULL(48) /* (internal) physical address size bits in EL3/EL1 */ #define TCR_PS_BITS_4GB ULL(0x0) diff --git a/include/lib/aarch64/arch_features.h b/include/lib/aarch64/arch_features.h index 2b09ba0..da8b6e4 100644 --- a/include/lib/aarch64/arch_features.h +++ b/include/lib/aarch64/arch_features.h @@ -11,10 +11,22 @@ #include <arch_helpers.h> +static inline bool is_armv7_gentimer_present(void) +{ + /* The Generic Timer is always present in an ARMv8-A implementation */ + return true; +} + static inline bool is_armv8_2_ttcnp_present(void) { return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_CNP_SHIFT) & ID_AA64MMFR2_EL1_CNP_MASK) != 0U; } +static inline bool is_armv8_4_ttst_present(void) +{ + return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_ST_SHIFT) & + ID_AA64MMFR2_EL1_ST_MASK) == 1U; +} + #endif /* ARCH_FEATURES_H */ diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h index d98ce48..750bbbd 100644 --- a/include/lib/aarch64/arch_helpers.h +++ b/include/lib/aarch64/arch_helpers.h @@ -182,6 +182,7 @@ DEFINE_SYSREG_READ_FUNC(id_pfr1_el1) DEFINE_SYSREG_READ_FUNC(id_aa64isar1_el1) DEFINE_SYSREG_READ_FUNC(id_aa64pfr0_el1) DEFINE_SYSREG_READ_FUNC(id_aa64dfr0_el1) +DEFINE_SYSREG_READ_FUNC(id_afr0_el1) DEFINE_SYSREG_READ_FUNC(CurrentEl) DEFINE_SYSREG_READ_FUNC(ctr_el0) DEFINE_SYSREG_RW_FUNCS(daif) diff --git a/include/lib/xlat_tables/aarch32/xlat_tables_aarch32.h b/include/lib/xlat_tables/aarch32/xlat_tables_aarch32.h index 37f3b53..4afd1c8 100644 --- a/include/lib/xlat_tables/aarch32/xlat_tables_aarch32.h +++ b/include/lib/xlat_tables/aarch32/xlat_tables_aarch32.h @@ -63,8 +63,7 @@ * is 1. * * Note that this macro assumes that the given virtual address space size is - * valid. Therefore, the caller is expected to check it is the case using the - * CHECK_VIRT_ADDR_SPACE_SIZE() macro first. + * valid. */ #define GET_XLAT_TABLE_LEVEL_BASE(_virt_addr_space_sz) \ (((_virt_addr_space_sz) > (ULL(1) << L1_XLAT_ADDRESS_SHIFT)) ? \ diff --git a/include/lib/xlat_tables/aarch64/xlat_tables_aarch64.h b/include/lib/xlat_tables/aarch64/xlat_tables_aarch64.h index 91ca8e4..8c29d00 100644 --- a/include/lib/xlat_tables/aarch64/xlat_tables_aarch64.h +++ b/include/lib/xlat_tables/aarch64/xlat_tables_aarch64.h @@ -43,14 +43,22 @@ unsigned long long tcr_physical_addr_size_bits(unsigned long long max_addr); * state. * * TCR.TxSZ is calculated as 64 minus the width of said address space. - * The value of TCR.TxSZ must be in the range 16 to 39 [1], which means that - * the virtual address space width must be in the range 48 to 25 bits. + * The value of TCR.TxSZ must be in the range 16 to 39 [1] or 48 [2], + * depending on Small Translation Table Support which means that + * the virtual address space width must be in the range 48 to 25 or 16 bits. * * [1] See the ARMv8-A Architecture Reference Manual (DDI 0487A.j) for more * information: * Page 1730: 'Input address size', 'For all translation stages'. + * [2] See section 12.2.55 in the ARMv8-A Architecture Reference Manual + * (DDI 0487D.a) */ +/* Maximum value of TCR_ELx.T(0,1)SZ is 39 */ #define MIN_VIRT_ADDR_SPACE_SIZE (ULL(1) << (U(64) - TCR_TxSZ_MAX)) + +/* Maximum value of TCR_ELx.T(0,1)SZ is 48 */ +#define MIN_VIRT_ADDR_SPACE_SIZE_TTST \ + (ULL(1) << (U(64) - TCR_TxSZ_MAX_TTST)) #define MAX_VIRT_ADDR_SPACE_SIZE (ULL(1) << (U(64) - TCR_TxSZ_MIN)) /* @@ -58,9 +66,13 @@ unsigned long long tcr_physical_addr_size_bits(unsigned long long max_addr); * virtual address space size. For a 4 KB page size, * - level 0 supports virtual address spaces of widths 48 to 40 bits; * - level 1 from 39 to 31; - * - level 2 from 30 to 25. + * - level 2 from 30 to 22. + * - level 3 from 21 to 16. * - * Wider or narrower address spaces are not supported. As a result, level 3 + * Small Translation Table (Armv8.4-TTST) support allows the starting level + * of the translation table from 3 for 4KB granularity. See section 12.2.55 in + * the ARMv8-A Architecture Reference Manual (DDI 0487D.a). In Armv8.3 and below + * wider or narrower address spaces are not supported. As a result, level 3 * cannot be used as initial lookup level with 4 KB granularity. See section * D4.2.5 in the ARMv8-A Architecture Reference Manual (DDI 0487A.j) for more * information. @@ -71,13 +83,14 @@ unsigned long long tcr_physical_addr_size_bits(unsigned long long max_addr); * is 1. * * Note that this macro assumes that the given virtual address space size is - * valid. Therefore, the caller is expected to check it is the case using the - * CHECK_VIRT_ADDR_SPACE_SIZE() macro first. + * valid. */ #define GET_XLAT_TABLE_LEVEL_BASE(_virt_addr_space_sz) \ (((_virt_addr_space_sz) > (ULL(1) << L0_XLAT_ADDRESS_SHIFT)) \ ? 0U \ - : (((_virt_addr_space_sz) > (ULL(1) << L1_XLAT_ADDRESS_SHIFT)) \ - ? 1U : 2U)) + : (((_virt_addr_space_sz) > (ULL(1) << L1_XLAT_ADDRESS_SHIFT)) \ + ? 1U \ + : (((_virt_addr_space_sz) > (ULL(1) << L2_XLAT_ADDRESS_SHIFT)) \ + ? 2U : 3U))) #endif /* XLAT_TABLES_AARCH64_H */ diff --git a/include/lib/xlat_tables/xlat_tables_arch.h b/include/lib/xlat_tables/xlat_tables_arch.h index 251b020..7237534 100644 --- a/include/lib/xlat_tables/xlat_tables_arch.h +++ b/include/lib/xlat_tables/xlat_tables_arch.h @@ -14,18 +14,6 @@ #endif /* - * Evaluates to 1 if the given virtual address space size is valid, or 0 if it's - * not. - * - * A valid size is one that is a power of 2 and is within the architectural - * limits. Not that these limits are different for AArch32 and AArch64. - */ -#define CHECK_VIRT_ADDR_SPACE_SIZE(size) \ - (((unsigned long long)(size) >= MIN_VIRT_ADDR_SPACE_SIZE) && \ - ((unsigned long long)(size) <= MAX_VIRT_ADDR_SPACE_SIZE) && \ - IS_POWER_OF_TWO(size)) - -/* * Evaluates to 1 if the given physical address space size is a power of 2, * or 0 if it's not. */ diff --git a/include/lib/xlat_tables/xlat_tables_v2.h b/include/lib/xlat_tables/xlat_tables_v2.h index fa2f9f5..0fe388b 100644 --- a/include/lib/xlat_tables/xlat_tables_v2.h +++ b/include/lib/xlat_tables/xlat_tables_v2.h @@ -209,6 +209,17 @@ void init_xlat_tables(void); void init_xlat_tables_ctx(xlat_ctx_t *ctx); /* + * Fill all fields of a dynamic translation tables context. It must be done + * either statically with REGISTER_XLAT_CONTEXT() or at runtime with this + * function. + */ +void xlat_setup_dynamic_ctx(xlat_ctx_t *ctx, unsigned long long pa_max, + uintptr_t va_max, struct mmap_region *mmap, + unsigned int mmap_num, uint64_t **tables, + unsigned int tables_num, uint64_t *base_table, + int xlat_regime, int *mapped_regions); + +/* * Add a static region with defined base PA and base VA. This function can only * be used before initializing the translation tables. The region cannot be * removed afterwards. diff --git a/include/lib/xlat_tables/xlat_tables_v2_helpers.h b/include/lib/xlat_tables/xlat_tables_v2_helpers.h index fa89958..aa2bd66 100644 --- a/include/lib/xlat_tables/xlat_tables_v2_helpers.h +++ b/include/lib/xlat_tables/xlat_tables_v2_helpers.h @@ -123,9 +123,6 @@ struct xlat_ctx { #define REGISTER_XLAT_CONTEXT_FULL_SPEC(_ctx_name, _mmap_count, \ _xlat_tables_count, _virt_addr_space_size, \ _phy_addr_space_size, _xlat_regime, _section_name)\ - CASSERT(CHECK_VIRT_ADDR_SPACE_SIZE(_virt_addr_space_size), \ - assert_invalid_virtual_addr_space_size_for_##_ctx_name);\ - \ CASSERT(CHECK_PHY_ADDR_SPACE_SIZE(_phy_addr_space_size), \ assert_invalid_physical_addr_space_sizefor_##_ctx_name);\ \ |