diff options
author | johpow01 <john.powell@arm.com> | 2021-11-11 16:13:32 -0600 |
---|---|---|
committer | johpow01 <john.powell@arm.com> | 2021-11-15 22:27:54 -0600 |
commit | d0bbe6e089d61f779b4eff0c82bc0c78e5363839 (patch) | |
tree | dc0bc2c608969f27fe93e93edd8b84d35c0b0b01 /include | |
parent | e7f69b059a5121a526e84e45301d428f179f6ef6 (diff) |
feat(hcx): test that HCRX_EL2 is accessible
On systems with FEAT_HCX support this CPU extension test attempts
to access HCRX_EL2, if it can then the test passes, if not the
system traps to EL3 and crashes. This tells us whether or not TF-A
has properly enabled access to the register. To enable this test,
compile TFTF with TESTS=hcx, this is done to prevent this test from
running automatically on systems which may support FEAT_HCX but do
not have it enabled in TFA.
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: If5787c3e947872169af3c9c3e57587cbcd41fd9e
Diffstat (limited to 'include')
-rw-r--r-- | include/lib/aarch64/arch.h | 14 | ||||
-rw-r--r-- | include/lib/aarch64/arch_features.h | 6 | ||||
-rw-r--r-- | include/lib/aarch64/arch_helpers.h | 3 |
3 files changed, 23 insertions, 0 deletions
diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h index 4350fbd..daab0d8 100644 --- a/include/lib/aarch64/arch.h +++ b/include/lib/aarch64/arch.h @@ -250,6 +250,10 @@ #define ID_AA64MMFR1_EL1_PAN_SUPPORTED ULL(0x1) #define ID_AA64MMFR1_EL1_PAN2_SUPPORTED ULL(0x2) #define ID_AA64MMFR1_EL1_PAN3_SUPPORTED ULL(0x3) +#define ID_AA64MMFR1_EL1_HCX_SHIFT U(40) +#define ID_AA64MMFR1_EL1_HCX_MASK ULL(0xf) +#define ID_AA64MMFR1_EL1_HCX_SUPPORTED ULL(0x1) +#define ID_AA64MMFR1_EL1_HCX_NOT_SUPPORTED ULL(0x0) /* ID_AA64MMFR2_EL1 definitions */ #define ID_AA64MMFR2_EL1 S3_0_C0_C7_2 @@ -1066,4 +1070,14 @@ #define TRCCLAIMCLR S2_1_c7_c9_6 #define TRCDEVARCH S2_1_c7_c15_6 +/******************************************************************************* + * FEAT_HCX - Extended Hypervisor Configuration Register + ******************************************************************************/ +#define HCRX_EL2 S3_4_C1_C2_2 +#define HCRX_EL2_FGTnXS_BIT (UL(1) << 4) +#define HCRX_EL2_FnXS_BIT (UL(1) << 3) +#define HCRX_EL2_EnASR_BIT (UL(1) << 2) +#define HCRX_EL2_EnALS_BIT (UL(1) << 1) +#define HCRX_EL2_EnAS0_BIT (UL(1) << 0) + #endif /* ARCH_H */ diff --git a/include/lib/aarch64/arch_features.h b/include/lib/aarch64/arch_features.h index 1002936..a111c2c 100644 --- a/include/lib/aarch64/arch_features.h +++ b/include/lib/aarch64/arch_features.h @@ -136,4 +136,10 @@ static inline unsigned int get_armv9_2_feat_rme_support(void) ID_AA64PFR0_FEAT_RME_SHIFT) & ID_AA64PFR0_FEAT_RME_MASK; } +static inline bool get_feat_hcx_support(void) +{ + return (((read_id_aa64mmfr1_el1() >> ID_AA64MMFR1_EL1_HCX_SHIFT) & + ID_AA64MMFR1_EL1_HCX_MASK) == ID_AA64MMFR1_EL1_HCX_SUPPORTED); +} + #endif /* ARCH_FEATURES_H */ diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h index 8287422..d4f0f9e 100644 --- a/include/lib/aarch64/arch_helpers.h +++ b/include/lib/aarch64/arch_helpers.h @@ -524,6 +524,9 @@ DEFINE_RENAME_SYSREG_RW_FUNCS(trcclaimset, TRCCLAIMSET) DEFINE_RENAME_SYSREG_RW_FUNCS(trcclaimclr, TRCCLAIMCLR) DEFINE_RENAME_SYSREG_READ_FUNC(trcdevarch, TRCDEVARCH) +/* FEAT_HCX HCRX_EL2 */ +DEFINE_RENAME_SYSREG_RW_FUNCS(hcrx_el2, HCRX_EL2) + #define IS_IN_EL(x) \ (GET_EL(read_CurrentEl()) == MODE_EL##x) |