diff options
| author | Olivier Deprez <olivier.deprez@arm.com> | 2022-01-18 15:51:49 +0100 |
|---|---|---|
| committer | Manish Pandey <manish.pandey2@arm.com> | 2022-02-09 15:34:15 +0000 |
| commit | c61ce3a49f70c9c96f536fb963edff0e64bde8f2 (patch) | |
| tree | 04addd3b81c6d282ef004a786333c13ab0468d44 /include | |
| parent | c8f6a6769694c1aed3ba01d649126168f4385eec (diff) | |
tftf(arch): exception syndrome iss macro
Add macros to extract the ISS portion of an ELx ESR exception syndrome
register.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I2bc94f05858f2dcbbe8ba81362bf660324fd388d
Diffstat (limited to 'include')
| -rw-r--r-- | include/lib/aarch64/arch.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h index d9bc33c..371a546 100644 --- a/include/lib/aarch64/arch.h +++ b/include/lib/aarch64/arch.h @@ -654,6 +654,8 @@ #define ESR_EC_SHIFT U(26) #define ESR_EC_MASK U(0x3f) #define ESR_EC_LENGTH U(6) +#define ESR_ISS_SHIFT U(0x0) +#define ESR_ISS_MASK U(0x1ffffff) #define EC_UNKNOWN U(0x0) #define EC_WFE_WFI U(0x1) #define EC_AARCH32_CP15_MRC_MCR U(0x3) @@ -680,6 +682,10 @@ #define EC_AARCH32_FP U(0x28) #define EC_AARCH64_FP U(0x2c) #define EC_SERROR U(0x2f) +/* Data Fault Status code, not all error codes listed */ +#define ISS_DFSC_MASK U(0x3f) +#define DFSC_EXT_DABORT U(0x10) +#define DFSC_GPF_DABORT U(0x28) /* * External Abort bit in Instruction and Data Aborts synchronous exception @@ -688,6 +694,7 @@ #define ESR_ISS_EABORT_EA_BIT U(9) #define EC_BITS(x) (((x) >> ESR_EC_SHIFT) & ESR_EC_MASK) +#define ISS_BITS(x) (((x) >> ESR_ISS_SHIFT) & ESR_ISS_MASK) /* Reset bit inside the Reset management register for EL3 (RMR_EL3) */ #define RMR_RESET_REQUEST_SHIFT U(0x1) |