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author | Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> | 2023-05-23 13:28:38 +0100 |
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committer | Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> | 2023-10-31 13:56:54 +0000 |
commit | 1768e59c3a6ac8d727ac012719b4b09947c8400d (patch) | |
tree | cc6ad04618bb60fb861bf3e7e4da2538c1a5cf42 /include/lib | |
parent | 5b68e20b2a0c9ac70caa2dd833d48f5fd49aa581 (diff) |
feat(rme): add tests to check NS SME ID registers and configurations
These tests checks the functionality of RMM for NS SME support.
- Create Realm and test ID registers specific to SME
- Check if Realm gets undefined abort when it accesses SME
- Check whether RMM preserves NS SMCR_EL2 register
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: Ia8ffd0188297a74c095dbadfb389add50c548e10
Diffstat (limited to 'include/lib')
-rw-r--r-- | include/lib/aarch64/arch.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h index 13d7063..0c64e40 100644 --- a/include/lib/aarch64/arch.h +++ b/include/lib/aarch64/arch.h @@ -408,6 +408,7 @@ #define ID_AA64PFR1_EL1_SME_SHIFT U(24) #define ID_AA64PFR1_EL1_SME_MASK ULL(0xf) +#define ID_AA64PFR1_EL1_SME_WIDTH ULL(0x4) #define ID_AA64PFR1_EL1_SME_NOT_SUPPORTED ULL(0x0) #define ID_AA64PFR1_EL1_SME_SUPPORTED ULL(0x1) #define ID_AA64PFR1_EL1_SME2_SUPPORTED ULL(0x2) @@ -477,6 +478,11 @@ #define CPACR_EL1_ZEN_TRAP_ALL U(0x2) #define CPACR_EL1_ZEN_TRAP_NONE U(0x3) +#define CPACR_EL1_SMEN(x) ((x) << 24) +#define CPACR_EL1_SMEN_TRAP_EL0 U(0x1) +#define CPACR_EL1_SMEN_TRAP_ALL U(0x2) +#define CPACR_EL1_SMEN_TRAP_NONE U(0x3) + /* SCR definitions */ #define SCR_RES1_BITS ((U(1) << 4) | (U(1) << 5)) #define SCR_AMVOFFEN_BIT (UL(1) << 35) |