clk: dts: mediatek: add Mediatek MT8173 clock bindings

Document the device-tree binding of Mediatek MT8173 SoC, including
TOPCKGEN, PLLs, INFRA and PERI clock controller.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Change-Id: I7f082db0622a7b8fdf8189c884641b5e0ec46197

1 files changed, 42 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8173-clock.txt b/Documentation/devicetree/bindings/clock/mediatek,mt8173-clock.txt
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+Mediatek MT8173 Clock Controller
+
+This binding uses the common clock binding:
+Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+The Mediatek MT8173 clock controller generates and supplies clock to various
+controllers within Mediatek MT8173 SoC.
+
+Required Properties:
+
+- compatible: should be one of following:
+	- "mediatek,mt8173-topckgen" : for topckgen clock controller of MT8173.
+	- "mediatek,mt8173-apmixedsys" : for apmixed_sys (PLLs) of MT8173.
+	- "mediatek,mt8173-infrasys" : for infra_sys clock controller of MT8173.
+	- "mediatek,mt8173-pericfg" : for peri_sys clock controller of MT8173.
+
+- reg: physical base address of the controller and length of memory mapped
+  region.
+
+- #clock-cells: should be 1.
+
+All available clocks are defined as preprocessor macros in
+dt-bindings/clock/mt8173-clk.h header and can be used in device tree sources.
+
+Example: I2C controller node that consumes the clock generated by the clock
+  controller (refer to the standard clock bindings for information about
+  "clocks" and "clock-names" properties):
+
+	pericfg: pericfg@10003000 {
+		compatible = "mediatek,mt8173-pericfg";
+		reg = <0 0x10003000 0 0x1000>;
+		#clock-cells = <1>;
+	};
+
+	i2c0: i2c@1100d000 {
+		compatible = "mediatek,mt8173-i2c", "mediatek,mt6589-i2c";
+		reg = <0 0x1100d000 0 0x70>, <0 0x11000300 0 0x80>;
+		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_LOW>;
+		clock-div = <16>;
+		clocks = <&pericfg PERI_I2C0>, <&pericfg PERI_AP_DMA>;
+		clock-names = "main", "dma";
+	};