diff options
author | Ulf Hansson <ulf.hansson@linaro.org> | 2024-02-08 00:48:26 +0100 |
---|---|---|
committer | Ulf Hansson <ulf.hansson@linaro.org> | 2024-02-08 00:48:26 +0100 |
commit | 7cb6f1a2b753447066597f15d179ec7690e25c27 (patch) | |
tree | f0cf3be42096db711b32e7ce21d214100714f931 | |
parent | 3cb07a80ef73ee8709a69a201e342d693816ad88 (diff) |
qemu_v8_scmi: Add device nodes for PM testsqemu_v8_scmi
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-rw-r--r-- | qemu_v8_scmi.dts | 196 |
1 files changed, 193 insertions, 3 deletions
diff --git a/qemu_v8_scmi.dts b/qemu_v8_scmi.dts index 785264a..5b2d987 100644 --- a/qemu_v8_scmi.dts +++ b/qemu_v8_scmi.dts @@ -386,6 +386,191 @@ compatible = "cfi-flash"; }; + opp_table_pd_perf0: opp-table-pd0 { + compatible = "operating-points-v2"; + + opp_pd_100: opp1 { + opp-level = <100>; + }; + + opp_pd_200: opp2 { + opp-level = <200>; + }; + }; + + opp_table_pd_perf1: opp-table-pd1 { + compatible = "operating-points-v2"; + + opp_pd_50: opp3 { + opp-level = <50>; + }; + + opp_pd_150: opp4 { + opp-level = <150>; + }; + }; + + opp_table_pd_perf: opp-table-pd-perf { + compatible = "operating-points-v2"; + + opp_pd_25: opp5 { + opp-level = <25>; + }; + + opp_pd_125: opp6 { + opp-level = <125>; + }; + + opp_pd_225: opp7 { + opp-level = <225>; + }; + }; + + domain_perf { + compatible = "test,pm-domain-test"; + + pd_perf0: pd-perf0 { + #power-domain-cells = <0>; + operating-points-v2 = <&opp_table_pd_perf0>; + }; + + pd_perf1: pd-perf1 { + #power-domain-cells = <0>; + operating-points-v2 = <&opp_table_pd_perf1>; + }; + + pd_perf_parent: pd-perf-parent { + #power-domain-cells = <0>; + operating-points-v2 = <&opp_table_pd_perf>; + }; + + pd_perf_child: pd-perf-child { + #power-domain-cells = <0>; + power-domains = <&pd_perf_parent>; + operating-points-v2 = <&opp_table_pd_perf>; + }; + }; + + domain_power { + compatible = "test,pm-domain-test"; + pd_power0: pd-power0 { + #power-domain-cells = <0>; + }; + pd_power1: pd-power1 { + #power-domain-cells = <0>; + }; + pd_power2: pd-power2 { + #power-domain-cells = <0>; + }; + pd_power3: pd-power3 { + #power-domain-cells = <0>; + }; + }; + + pm_test0 { + compatible = "test,pm-test"; + power-domains = <&scmi_devpd 0>; + }; + + pm_test1 { + compatible = "test,pm-test"; + power-domains = <&scmi_devpd 1>; + }; + + pm_test2 { + compatible = "test,pm-test"; + power-domains = <&scmi_devpd 2>; + }; + + pm_test3 { + compatible = "test,pm-test"; + power-domains = <&scmi_dvfs 2>; + }; + + pm_test4 { + compatible = "test,pm-test"; + power-domains = <&scmi_dvfs 2>; + }; + + opp_table_pm_test: opp-table-pm { + compatible = "operating-points-v2"; + + opp-100000 { + opp-hz = /bits/ 64 <133>; + //opp-level = <10>; + required-opps = <&opp_pd_100>; + }; + + opp-200000 { + opp-hz = /bits/ 64 <266>; + //opp-level = <20>; + required-opps = <&opp_pd_200>; + }; + }; + + opp_table_pm_test_child: opp-table-pm-child { + compatible = "operating-points-v2"; + + opp-25 { + opp-hz = /bits/ 64 <133>; + //opp-level = <10>; + required-opps = <&opp_pd_25>; + }; + + opp-125 { + opp-hz = /bits/ 64 <266>; + //opp-level = <20>; + required-opps = <&opp_pd_125>; + }; + + opp-225 { + opp-hz = /bits/ 64 <333>; + //opp-level = <20>; + required-opps = <&opp_pd_225>; + }; + }; + + pm_test5 { + compatible = "test,pm-test"; + power-domains = <&pd_perf0>; + operating-points-v2 = <&opp_table_pm_test>; + }; + + pm_test6 { + compatible = "test,pm-test"; + power-domains = <&pd_perf0>, <&pd_perf1>; + power-domain-names = "perf0", "perf1"; + operating-points-v2 = <&opp_table_pm_test>; + }; + + pm_test8 { + compatible = "test,pm-test"; + //power-domains = <&pd_power1>, <&pd_power2>, <&pd_power3>; + //power-domain-names = "power1", "power2", "power3"; + //power-domains = <&pd_power1>, <&pd_power2>; + //power-domain-names = "power1", "power2"; + power-domains = <&pd_power1>, <&pd_power2>; + power-domain-names = "perf1", "perf2", "perf3"; + }; + + pm_test9 { + compatible = "test,pm-test"; + power-domains = <&pd_perf_child>; + operating-points-v2 = <&opp_table_pm_test_child>; + }; + + pm_test10 { + compatible = "test,pm-test"; + power-domains = <&pd_perf_child>; + operating-points-v2 = <&opp_table_pm_test_child>; + }; + + pm_test11 { + compatible = "test,pm-test"; + power-domains = <&pd_perf_parent>; + operating-points-v2 = <&opp_table_pm_test_child>; + }; + cpus { #size-cells = < 0x00 >; #address-cells = < 0x01 >; @@ -412,7 +597,9 @@ reg = < 0x00 >; compatible = "arm,cortex-a57"; device_type = "cpu"; - clocks = <&scmi_dvfs 0>; + //clocks = <&scmi_dvfs 0>; + power-domains = <&scmi_dvfs 0>; + power-domain-names = "perf"; }; cpu@1 { @@ -420,7 +607,9 @@ reg = < 0x01 >; compatible = "arm,cortex-a57"; device_type = "cpu"; - clocks = <&scmi_dvfs 0>; + //clocks = <&scmi_dvfs 0>; + power-domains = <&scmi_dvfs 0>; + power-domain-names = "perf"; }; }; @@ -479,7 +668,8 @@ scmi_dvfs: protocol@13 { reg = <0x13>; - #clock-cells = <1>; + #power-domain-cells = <1>; + //#clock-cells = <1>; linaro,optee-channel-id = <0x02>; }; }; |