From d49f341e15af95a2a19850ee74d245270fa0cf38 Mon Sep 17 00:00:00 2001 From: Sai Prakash Ranjan Date: Sat, 19 Oct 2019 17:07:12 +0530 Subject: dt-bindings: msm: Convert LLCC bindings to YAML Convert LLCC bindings to DT schema format using json-schema. Reviewed-by: Stephen Boyd Signed-off-by: Sai Prakash Ranjan Signed-off-by: Bjorn Andersson --- .../devicetree/bindings/arm/msm/qcom,llcc.yaml | 54 ++++++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml (limited to 'Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml') diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml new file mode 100644 index 000000000000..5ac90d101807 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/msm/qcom,llcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Last Level Cache Controller + +maintainers: + - Rishabh Bhatnagar + - Sai Prakash Ranjan + +description: | + LLCC (Last Level Cache Controller) provides last level of cache memory in SoC, + that can be shared by multiple clients. Clients here are different cores in the + SoC, the idea is to minimize the local caches at the clients and migrate to + common pool of memory. Cache memory is divided into partitions called slices + which are assigned to clients. Clients can query the slice details, activate + and deactivate them. + +properties: + compatible: + enum: + - qcom,sdm845-llcc + + reg: + items: + - description: LLCC base register region + - description: LLCC broadcast base register region + + reg-names: + items: + - const: llcc_base + - const: llcc_broadcast_base + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - reg-names + - interrupts + +examples: + - | + #include + + cache-controller@1100000 { + compatible = "qcom,sdm845-llcc"; + reg = <0x1100000 0x200000>, <0x1300000 0x50000> ; + reg-names = "llcc_base", "llcc_broadcast_base"; + interrupts = ; + }; -- cgit v1.2.3 From 4c61ec0f2dc0ab9e8bfa541c05c929570c1cde5a Mon Sep 17 00:00:00 2001 From: Sai Prakash Ranjan Date: Sat, 19 Oct 2019 17:07:13 +0530 Subject: dt-bindings: msm: Add LLCC for SC7180 Add LLCC compatible for SC7180 SoC. Reviewed-by: Stephen Boyd Signed-off-by: Sai Prakash Ranjan Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml') diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml index 5ac90d101807..558749065b97 100644 --- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml @@ -21,6 +21,7 @@ description: | properties: compatible: enum: + - qcom,sc7180-llcc - qcom,sdm845-llcc reg: -- cgit v1.2.3