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authorHans de Goede <hdegoede@redhat.com>2018-10-14 19:54:27 +0200
committerAndy Shevchenko <andriy.shevchenko@linux.intel.com>2018-10-29 14:02:14 +0200
commit49ad712afa88c502831d37f7089d98eac441fb80 (patch)
treea4a8102c4fb0cc0c3b29c120d0781454db41436f /drivers/platform/x86/Makefile
parent4104916d8cad141faa6c24003540e0faeed859fd (diff)
platform/x86: Add Intel AtomISP2 dummy / power-management driver
The Image Signal Processor found on Cherry Trail devices is brought up in D0 state on devices which have camera sensors attached to it. The ISP will not enter D3 state again without some massaging of its registers beforehand and the ISP not being in D3 state blocks the SoC from entering S0ix modes. There was a driver for the ISP in drivers/staging but that got removed again because it never worked. It does not seem likely that a real driver for the ISP will be added to the mainline kernel anytime soon. This commit adds a dummy driver which contains the necessary magic from the staging driver to powerdown the ISP, so that Cherry Trail devices where the ISP is used will properly use S0ix modes when suspended. Together with other recent S0ix related fixes this allows S0ix modes to be entered on e.g. a Chuwi Hi8 Pro and a HP x2 210. BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=196915 Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Diffstat (limited to 'drivers/platform/x86/Makefile')
-rw-r--r--drivers/platform/x86/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/platform/x86/Makefile b/drivers/platform/x86/Makefile
index 395c8ff12bd1..39ae94135406 100644
--- a/drivers/platform/x86/Makefile
+++ b/drivers/platform/x86/Makefile
@@ -95,3 +95,4 @@ obj-$(CONFIG_MLX_PLATFORM) += mlx-platform.o
obj-$(CONFIG_INTEL_TURBO_MAX_3) += intel_turbo_max_3.o
obj-$(CONFIG_INTEL_CHTDC_TI_PWRBTN) += intel_chtdc_ti_pwrbtn.o
obj-$(CONFIG_I2C_MULTI_INSTANTIATE) += i2c-multi-instantiate.o
+obj-$(CONFIG_INTEL_ATOMISP2_PM) += intel_atomisp2_pm.o