diff options
| author | Loic Poulain <loic.poulain@linaro.org> | 2020-03-24 16:58:37 +0100 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2020-04-13 22:04:41 -0700 |
| commit | 1c51a4aba5916a0624cda69e10a02a21f76345c3 (patch) | |
| tree | 274d5332405f304f30c0dd4d4fdd29723e89d914 /arch/arm64/boot/dts/qcom/msm8916.dtsi | |
| parent | 75e85d53fad2a072fcb12359b9f3952839e73576 (diff) | |
arm64: dts: qcom: msm8916: Add i2c-qcom-cci node
The msm8916 CCI controller provides one CCI/I2C bus.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200324155843.10719-2-robert.foss@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/msm8916.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/msm8916.dtsi | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 2fdc6aa61b83..0eba168f0a5c 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -1604,6 +1604,33 @@ #size-cells = <0>; }; }; + + cci: cci@1b0c000 { + compatible = "qcom,msm8916-cci"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1b0c000 0x1000>; + interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>; + clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>, + <&gcc GCC_CAMSS_CCI_AHB_CLK>, + <&gcc GCC_CAMSS_CCI_CLK>, + <&gcc GCC_CAMSS_AHB_CLK>; + clock-names = "camss_top_ahb", "cci_ahb", + "cci", "camss_ahb"; + assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>, + <&gcc GCC_CAMSS_CCI_CLK>; + assigned-clock-rates = <80000000>, <19200000>; + pinctrl-names = "default"; + pinctrl-0 = <&cci0_default>; + status = "disabled"; + + cci_i2c0: i2c-bus@0 { + reg = <0>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; }; smd { |