From eac93d398f101da2fa73a00ac9e668721afc9019 Mon Sep 17 00:00:00 2001 From: Stephan Gerhold Date: Mon, 25 Nov 2019 18:04:25 +0100 Subject: ARM: dts: ux500: Disable I2C/SPI buses by default At the moment, all 5 I2C and 6 SPI buses are probed and exposed to user-space by default - even if they are not muxed to any pins on the board. This means that user-space sees an I2C/SPI bus that cannot be actually used properly. In some cases this was used to put the corresponding pins into a low power sleep mode - but even then the pins first need to be configured by the board-specific device tree part. Avoid exposing unconfigured devices to user-space by disabling the I2C/SPI buses by default. Enable them in the board device trees when needed. Signed-off-by: Stephan Gerhold Link: https://lore.kernel.org/r/20191125170428.76069-1-stephan@gerhold.net Signed-off-by: Linus Walleij --- arch/arm/boot/dts/ste-dbx5x0.dtsi | 22 ++++++++++++++++++++++ arch/arm/boot/dts/ste-href.dtsi | 4 ++++ arch/arm/boot/dts/ste-hrefprev60.dtsi | 1 + arch/arm/boot/dts/ste-snowball.dts | 5 +++++ 4 files changed, 32 insertions(+) diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi index bda454d12150..d0770c05c457 100644 --- a/arch/arm/boot/dts/ste-dbx5x0.dtsi +++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi @@ -651,6 +651,8 @@ clocks = <&prcc_kclk 3 3>, <&prcc_pclk 3 3>; clock-names = "i2cclk", "apb_pclk"; power-domains = <&pm_domains DOMAIN_VAPE>; + + status = "disabled"; }; i2c@80122000 { @@ -667,6 +669,8 @@ clocks = <&prcc_kclk 1 2>, <&prcc_pclk 1 2>; clock-names = "i2cclk", "apb_pclk"; power-domains = <&pm_domains DOMAIN_VAPE>; + + status = "disabled"; }; i2c@80128000 { @@ -683,6 +687,8 @@ clocks = <&prcc_kclk 1 6>, <&prcc_pclk 1 6>; clock-names = "i2cclk", "apb_pclk"; power-domains = <&pm_domains DOMAIN_VAPE>; + + status = "disabled"; }; i2c@80110000 { @@ -699,6 +705,8 @@ clocks = <&prcc_kclk 2 0>, <&prcc_pclk 2 0>; clock-names = "i2cclk", "apb_pclk"; power-domains = <&pm_domains DOMAIN_VAPE>; + + status = "disabled"; }; i2c@8012a000 { @@ -715,6 +723,8 @@ clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 10>; clock-names = "i2cclk", "apb_pclk"; power-domains = <&pm_domains DOMAIN_VAPE>; + + status = "disabled"; }; spi@80002000 { @@ -729,6 +739,8 @@ <&dma 8 0 0x0>; /* Logical - MemToDev */ dma-names = "rx", "tx"; power-domains = <&pm_domains DOMAIN_VAPE>; + + status = "disabled"; }; spi@80003000 { @@ -743,6 +755,8 @@ <&dma 9 0 0x0>; /* Logical - MemToDev */ dma-names = "rx", "tx"; power-domains = <&pm_domains DOMAIN_VAPE>; + + status = "disabled"; }; spi@8011a000 { @@ -758,6 +772,8 @@ <&dma 0 0 0x0>; /* Logical - MemToDev */ dma-names = "rx", "tx"; power-domains = <&pm_domains DOMAIN_VAPE>; + + status = "disabled"; }; spi@80112000 { @@ -773,6 +789,8 @@ <&dma 35 0 0x0>; /* Logical - MemToDev */ dma-names = "rx", "tx"; power-domains = <&pm_domains DOMAIN_VAPE>; + + status = "disabled"; }; spi@80111000 { @@ -788,6 +806,8 @@ <&dma 33 0 0x0>; /* Logical - MemToDev */ dma-names = "rx", "tx"; power-domains = <&pm_domains DOMAIN_VAPE>; + + status = "disabled"; }; spi@80129000 { @@ -803,6 +823,8 @@ <&dma 40 0 0x0>; /* Logical - MemToDev */ dma-names = "rx", "tx"; power-domains = <&pm_domains DOMAIN_VAPE>; + + status = "disabled"; }; ux500_serial0: uart@80120000 { diff --git a/arch/arm/boot/dts/ste-href.dtsi b/arch/arm/boot/dts/ste-href.dtsi index 7613a40421d5..5eafd5d8a8cd 100644 --- a/arch/arm/boot/dts/ste-href.dtsi +++ b/arch/arm/boot/dts/ste-href.dtsi @@ -39,18 +39,21 @@ pinctrl-names = "default","sleep"; pinctrl-0 = <&i2c0_a_1_default>; pinctrl-1 = <&i2c0_a_1_sleep>; + status = "okay"; }; i2c@80122000 { pinctrl-names = "default","sleep"; pinctrl-0 = <&i2c1_b_2_default>; pinctrl-1 = <&i2c1_b_2_sleep>; + status = "okay"; }; i2c@80128000 { pinctrl-names = "default","sleep"; pinctrl-0 = <&i2c2_b_2_default>; pinctrl-1 = <&i2c2_b_2_sleep>; + status = "okay"; lp5521@33 { compatible = "national,lp5521"; reg = <0x33>; @@ -98,6 +101,7 @@ pinctrl-names = "default","sleep"; pinctrl-0 = <&i2c3_c_2_default>; pinctrl-1 = <&i2c3_c_2_sleep>; + status = "okay"; }; /* ST6G3244ME level translator for 1.8/2.9 V */ diff --git a/arch/arm/boot/dts/ste-hrefprev60.dtsi b/arch/arm/boot/dts/ste-hrefprev60.dtsi index a036defdf164..937f942f0961 100644 --- a/arch/arm/boot/dts/ste-hrefprev60.dtsi +++ b/arch/arm/boot/dts/ste-hrefprev60.dtsi @@ -58,6 +58,7 @@ */ pinctrl-names = "default"; pinctrl-0 = <&ssp0_hrefprev60_mode>; + status = "okay"; }; // External Micro SD slot diff --git a/arch/arm/boot/dts/ste-snowball.dts b/arch/arm/boot/dts/ste-snowball.dts index 8b80dcdf6e5b..ce136412b6da 100644 --- a/arch/arm/boot/dts/ste-snowball.dts +++ b/arch/arm/boot/dts/ste-snowball.dts @@ -307,18 +307,21 @@ pinctrl-names = "default","sleep"; pinctrl-0 = <&i2c0_a_1_default>; pinctrl-1 = <&i2c0_a_1_sleep>; + status = "okay"; }; i2c@80122000 { pinctrl-names = "default","sleep"; pinctrl-0 = <&i2c1_b_2_default>; pinctrl-1 = <&i2c1_b_2_sleep>; + status = "okay"; }; i2c@80128000 { pinctrl-names = "default","sleep"; pinctrl-0 = <&i2c2_b_2_default>; pinctrl-1 = <&i2c2_b_2_sleep>; + status = "okay"; lsm303dlh@18 { /* Accelerometer */ compatible = "st,lsm303dlh-accel"; @@ -369,11 +372,13 @@ pinctrl-names = "default","sleep"; pinctrl-0 = <&i2c3_c_2_default>; pinctrl-1 = <&i2c3_c_2_sleep>; + status = "okay"; }; spi@80002000 { pinctrl-names = "default"; pinctrl-0 = <&ssp0_snowball_mode>; + status = "okay"; }; prcmu@80157000 { -- cgit v1.2.3