diff options
| author | Alexandre Courbot <acourbot@nvidia.com> | 2016-12-14 17:02:48 +0900 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2017-02-17 15:14:32 +1000 |
| commit | 45ef8450098fbb243ad65f590b965db1247d2d7e (patch) | |
| tree | 0f41b4dd0329edb7253b3fbfae01f20018100123 /drivers/gpu/drm/nouveau/nvkm/subdev/secboot | |
| parent | b606234e2ffe0059055fcf38c087d5f71ca3b4b7 (diff) | |
drm/nouveau/secboot: set default error value in error register
Set a default error value in the mailbox 0 register so we can catch
cases where the secure boot binary fails early without being able to
report anything.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/subdev/secboot')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c index 2fcb2f761a54..813c4eb0b25f 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c @@ -67,6 +67,9 @@ gm200_secboot_run_blob(struct nvkm_secboot *sb, struct nvkm_gpuobj *blob) /* Disable interrupts as we will poll for the HALT bit */ nvkm_mc_intr_mask(sb->subdev.device, falcon->owner->index, false); + /* Set default error value in mailbox register */ + nvkm_falcon_wr32(falcon, 0x040, 0xdeada5a5); + /* Start the HS bootloader */ nvkm_falcon_set_start_addr(falcon, sb->acr->start_address); nvkm_falcon_start(falcon); |