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AgeCommit message (Expand)Author
2023-12-10Improve performance of the H8 simulatorJeff Law
2023-12-07sim: aarch64: fix -Wunused-but-set-variable warningsMike Frysinger
2023-12-07sim: common: fix -Wunused-but-set-variable warningsMike Frysinger
2023-12-07sim: ppc: fix -Wunused-but-set-variable warningsMike Frysinger
2023-12-07sim: v850: fix -Wunused-but-set-variable warningsMike Frysinger
2023-12-07sim: sh: fix -Wunused-but-set-variable warningsMike Frysinger
2023-12-07sim: msp430: fix -Wunused-but-set-variable warningsMike Frysinger
2023-12-07sim: mips: fix -Wunused-but-set-variable warningsMike Frysinger
2023-12-07sim: mcore: fix -Wunused-but-set-variable warningsMike Frysinger
2023-12-07sim: m68hc11: fix -Wunused-but-set-variable warningsMike Frysinger
2023-12-07sim: h8300: fix -Wunused-but-set-variable warningsMike Frysinger
2023-12-07sim: ft32: fix -Wunused-but-set-variable warningsMike Frysinger
2023-12-07sim: frv: fix -Wunused-but-set-variable warningsMike Frysinger
2023-12-07sim: erc32: fix -Wunused-but-set-variable warningsMike Frysinger
2023-12-07sim: d10v: fix -Wunused-but-set-variable warningsMike Frysinger
2023-12-07sim: cris: fix -Wunused-but-set-variable warningsMike Frysinger
2023-12-07sim: bfin: fix -Wunused-but-set-variable warningsMike Frysinger
2023-12-07sim: bfin: gui: fix -Wunused-but-set-variable warningsMike Frysinger
2023-12-07sim: arm: fix -Wunused-but-set-variable warningsMike Frysinger
2023-12-07sim: m32r: fix syslog callMike Frysinger
2023-12-07sim: m32r: include more glibc headers for the funcs we use [PR sim/29752]Mike Frysinger
2023-12-07sim: m32r: add more cgen prototypes for trapsMike Frysinger
2023-12-07sim: m32r: add more cgen prototypes to enable -Werror in most filesMike Frysinger
2023-12-07sim: warnings: disable -Wenum-conversion fow now [PR sim/29752]Mike Frysinger
2023-12-06sim: support dlopen in -lcMike Frysinger
2023-12-06sim: cris: move generated file to right placeMike Frysinger
2023-12-06sim: warnings: add more flagsMike Frysinger
2023-12-05sim: warnings: sync some build logic from gdbsupportMike Frysinger
2023-12-05sim: mips: fix sim_fpu usageMike Frysinger
2023-12-05sim: sh: trim trailing whitespace in generated codeMike Frysinger
2023-12-05sim: mn10300: fix sim_engine_halt callMike Frysinger
2023-12-05sim: m32c: use UTF-8 encodingMike Frysinger
2023-12-04sim: rx: mark unused static var as unusedMike Frysinger
2023-12-04sim: rx: constify some read-only global varsMike Frysinger
2023-12-04sim: warnings: enable only for development buildsMike Frysinger
2023-12-04sim: ppc: fix implicit enum conversionMike Frysinger
2023-12-04sim: ppc: fix -Wmisleading-indentation warningsMike Frysinger
2023-12-04sim: ppc: cleanup getrusage declsMike Frysinger
2023-12-01Fix right shifts in mcore simulator on 64 bit hosts.Jeff Law
2023-11-28sim: bpf: do not use semicolon to begin commentsJose E. Marchesi
2023-11-16sim: mips: Change E_MIPS_* to EF_MIPS_*Ying Huang
2023-10-18sim/riscv: fix JALR instruction simulationJaydeep Patil
2023-10-15sim: mips: fix printf stringMike Frysinger
2023-10-11[RFA] Fix for mcore simulatorJeff Law
2023-08-26Simplify definition of GUILETom Tromey
2023-08-24sim: or1k: Eliminate dangerous RWX load segmentsStafford Horne
2023-08-21sim: bpf: remove negi, neg32i insnsDavid Faust
2023-08-19Placate -Wmissing-declarations in sim/crisTom Tromey
2023-08-19Remove extraneous '%' from sim/cris/local.mkTom Tromey
2023-08-19sim regenAlan Modra
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