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AgeCommit message (Expand)Author
2023-10-07Revert "opcodes: microblaze: Add new bit-field instructions"Michael J. Eager
2023-10-06opcodes: microblaze: Add new bit-field instructionsNeal Frager
2023-10-05microblaze: Add address extension instructionsNeal frager
2023-10-04opcodes: microblaze: Add hibernate and suspend instructionsNeal frager
2023-10-04aarch64: Refactor system register dataVictor Do Nascimento
2023-10-04aarch64: system register aliasing detectionVictor Do Nascimento
2023-09-27opcodes: microblaze: Add wdc.ext.clear and wdc.ext.flush insnsNeal Frager
2023-09-27x86: fold FMA VEX and EVEX templatesJan Beulich
2023-09-27x86: fold VAES/VPCLMULQDQ VEX and EVEX templatesJan Beulich
2023-09-27x86: fold certain VEX and EVEX templatesJan Beulich
2023-09-27Add support for "pcaddi rd, symbol"mengqinggang
2023-09-26aarch64: Restructure feature flag handlingRichard Sandiford
2023-09-25Revert "arc: Add new opcode functions for ARCv3 ISA."Claudiu Zissulescu
2023-09-25Revert "arc: New ARCv3 ISA instruction table"Claudiu Zissulescu
2023-09-25arc: New ARCv3 ISA instruction tableClaudiu Zissulescu
2023-09-25arc: Add new opcode functions for ARCv3 ISA.Claudiu Zissulescu
2023-09-15x86: fold CpuLM and Cpu64Jan Beulich
2023-09-14x86: Vxy naming correctionJan Beulich
2023-09-14x86: support AVX10.1 vector size restrictionsJan Beulich
2023-09-14x86: support AVX10.1/512Jan Beulich
2023-09-14x86: make AES/PCMULQDQ respectively prereqs of VAES/VPCMULQDQJan Beulich
2023-09-08Set insn_type for branch instructions on aarch64Vladimir Mezentsev
2023-09-08PR30793, kvx_reassemble_bundle index 8 out of boundsAlan Modra
2023-09-07RISC-V: Clarify the naming rules of vendor operands.Nelson Chu
2023-09-05RISC-V: fold duplicate code in vector_macro()Jan Beulich
2023-09-01x86: rename CpuPCLMULJan Beulich
2023-09-01x86: drop Size64 from VMOVQJan Beulich
2023-09-01RISC-V: move various alias entriesJan Beulich
2023-08-30RISC-V: Make XVentanaCondOps RV64 onlyTsukasa OI
2023-08-26Simplify definition of GUILETom Tromey
2023-08-26opcodes i386 and ia64 gen file warningsAlan Modra
2023-08-24kvx: fix kvx_reassemble_bundle index 8 out of boundsPaul Iannetta
2023-08-24kvx: workaround gcc-4.5 bugAlan Modra
2023-08-24kvx: use {u,}int32_t and {u,}int64_tPaul Iannetta
2023-08-22aarch64: Improve naming conventions for A and R-profile architectureVictor Do Nascimento
2023-08-22kvx_dis_initAlan Modra
2023-08-21bpf: correct neg and neg32 instruction encodingDavid Faust
2023-08-19sim --enable-cgen-maintAlan Modra
2023-08-16kvx: New port.Paul Iannetta
2023-08-15RISC-V: Make "fli.h" available to 'Zvfh' + 'Zfa'Tsukasa OI
2023-08-15RISC-V: Add support for the 'Zihintntl' extensionTsukasa OI
2023-08-15RISC-V: remove indirection from register tablesJan Beulich
2023-08-12regen configAlan Modra
2023-08-11x86: pack CPU flags in opcode tableJan Beulich
2023-08-11RISC-V: Fix opcode entries of "vmsge{,u}.vx"Tsukasa OI
2023-08-09bpf: use w regs in 32-bit non-fetch atomic pseudo-cDavid Faust
2023-08-07RISC-V: move comment describing rules for riscv_opcodes[]Jan Beulich
2023-08-03cris: sprintf optimisationAlan Modra
2023-08-03cris: sprintf sanitizer null destination pointerAlan Modra
2023-08-03 Fix Wlto-type-mismatch in opcodes/ft32-dis.cTom de Vries