| Age | Commit message (Expand) | Author |
|---|
| 2024-01-15 | opcodes: x86: new marker for insns that implicitly update stack pointer | Indu Bhagat |
| 2024-01-15 | opcodes: gas: x86: define and use Rex2 as attribute not constraint | Indu Bhagat |
| 2024-01-09 | x86: add missing APX logic to cpu_flags_match() | Jan Beulich |
| 2024-01-04 | Update year range in copyright notice of binutils files | Alan Modra |
| 2023-12-28 | Support APX pushp/popp | Cui, Lili |
| 2023-12-28 | Support APX Push2/Pop2 | Mo, Zewei |
| 2023-12-28 | Support APX NDD | konglin1 |
| 2023-12-28 | Support APX GPR32 with extend evex prefix | Cui, Lili |
| 2023-12-28 | Support APX GPR32 with rex2 prefix | Cui, Lili |
| 2023-12-19 | x86: Remove the restriction for size of the mask register in AVX10 | Haochen Jiang |
| 2023-12-15 | revert "x86: allow 32-bit reg to be used with U{RD,WR}MSR" | Jan Beulich |
| 2023-12-15 | x86: fold assembly dialect attributes | Jan Beulich |
| 2023-12-15 | x86: Intel syntax implies Intel mnemonics | Jan Beulich |
| 2023-12-14 | Remove redundant Byte, Word, Dword and Qword from insn templates. | Cui, Lili |
| 2023-12-01 | x86: allow 32-bit reg to be used with U{RD,WR}MSR | Jan Beulich |
| 2023-11-24 | x86: also prefer VEX encoding over EVEX one for VCVTNEPS2BF16 when possible | Jan Beulich |
| 2023-11-17 | x86: CPU-qualify {disp16} / {disp32} | Jan Beulich |
| 2023-11-09 | x86: rework UWRMSR operand swapping | Jan Beulich |
| 2023-11-09 | x86: split insn templates' CPU field | Jan Beulich |
| 2023-11-09 | x86: Cpu64 handling improvements | Jan Beulich |
| 2023-10-31 | Support Intel USER_MSR | Hu, Lin1 |
| 2023-09-27 | x86: fold FMA VEX and EVEX templates | Jan Beulich |
| 2023-09-27 | x86: fold VAES/VPCLMULQDQ VEX and EVEX templates | Jan Beulich |
| 2023-09-27 | x86: fold certain VEX and EVEX templates | Jan Beulich |
| 2023-09-14 | x86: Vxy naming correction | Jan Beulich |
| 2023-09-14 | x86: support AVX10.1 vector size restrictions | Jan Beulich |
| 2023-09-14 | x86: make AES/PCMULQDQ respectively prereqs of VAES/VPCMULQDQ | Jan Beulich |
| 2023-09-01 | x86: rename CpuPCLMUL | Jan Beulich |
| 2023-09-01 | x86: drop Size64 from VMOVQ | Jan Beulich |
| 2023-08-02 | Revert "2.41 Release sources" | Sam James |
| 2023-08-02 | 2.41 Release sources | Nick Clifton |
| 2023-07-27 | Support Intel PBNDKB | Hu, Lin1 |
| 2023-07-27 | Support Intel SM4 | Haochen Jiang |
| 2023-07-27 | Support Intel SM3 | Haochen Jiang |
| 2023-07-27 | Support Intel SHA512 | Haochen Jiang |
| 2023-07-27 | Support Intel AVX-VNNI-INT16 | konglin1 |
| 2023-07-04 | x86: optimize 128-bit VPBROADCASTQ to VPUNPCKLQDQ | Jan Beulich |
| 2023-07-04 | x86: optimize pre-AVX512 {,V}PCMPGT* with identical sources | Jan Beulich |
| 2023-07-04 | x86: optimize pre-AVX512 {,V}PCMPEQQ with identical sources | Jan Beulich |
| 2023-06-16 | x86: shrink Masking insn attribute to a single bit (boolean) | Jan Beulich |
| 2023-05-23 | Support Intel FRED LKGS | Zhang, Jun |
| 2023-05-23 | Revert "Support Intel FRED LKGS" | liuhongt |
| 2023-05-23 | Support Intel FRED LKGS | Zhang, Jun |
| 2023-04-07 | Support Intel AMX-COMPLEX | Haochen Jiang |
| 2023-03-20 | x86: drop "shimm" special case template expansions | Jan Beulich |
| 2023-03-20 | x86: VexVVVV is now merely a boolean | Jan Beulich |
| 2023-03-20 | x86: re-work build_modrm_byte()'s register assignment | Jan Beulich |
| 2023-02-24 | x86: MONITOR/MWAIT are not SSE3 insns | Jan Beulich |
| 2023-02-24 | x86-64: don't permit LAHF/SAHF with "generic64" | Jan Beulich |
| 2023-02-24 | x86: have insns acting on segment selector values allow for consistent operands | Jan Beulich |
