Age | Commit message (Expand) | Author |
2023-12-28 | Support APX Push2/Pop2 | Mo, Zewei |
2023-12-28 | Support APX NDD | konglin1 |
2023-12-28 | Support APX GPR32 with extend evex prefix | Cui, Lili |
2023-12-28 | Created an empty EVEX_MAP4_ sub-table for EVEX instructions. | Cui, Lili |
2023-08-02 | Revert "2.41 Release sources" | Sam James |
2023-08-02 | 2.41 Release sources | Nick Clifton |
2023-07-11 | x86: misc further register-only insns don't need to go through mod_table[] | Jan Beulich |
2023-07-11 | x86: slightly rework handling of some register-only insns | Jan Beulich |
2023-07-11 | x86: misc further memory-only insns don't need to go through mod_table[] | Jan Beulich |
2023-07-11 | x86: {,V}MOVNT* don't need to go through mod_table[] | Jan Beulich |
2023-07-11 | x86: fold legacy/VEX {,V}MOV{H,L}* entries | Jan Beulich |
2023-07-11 | x86: fold certain legacy/VEX table entries | Jan Beulich |
2023-07-04 | x86: flag bad EVEX masking for miscellaneous insns | Jan Beulich |
2022-11-02 | Support Intel AVX-IFMA | Hongyu Wang |
2022-10-24 | x86: emit {evex} prefix when disassembling ambiguous AVX512VL insns | Jan Beulich |
2022-10-17 | x86: fold AVX512-VNNI disassembler entries with AVX-VNNI ones | Jan Beulich |
2022-01-14 | x86: share yet more VEX table entries with EVEX decoding | Jan Beulich |
2022-01-14 | x86: consistently use scalar_mode for AVX512-FP16 scalar insns | Jan Beulich |
2022-01-14 | x86: reduce AVX512 FP set of insns decoded through vex_w_table[] | Jan Beulich |
2022-01-14 | x86: reduce AVX512-FP16 set of insns decoded through vex_w_table[] | Jan Beulich |
2021-08-05 | [PATCH 1/2] Enable Intel AVX512_FP16 instructions | Cui,Lili |
2021-07-22 | x86: drop vex_scalar_w_dq_mode | Jan Beulich |
2021-07-22 | x86: drop OP_Mask() | Jan Beulich |
2021-03-25 | x86: flag bad S/G insn operand combinations | Jan Beulich |
2021-03-10 | x86/Intel: correct AVX512 S/G disassembly | Jan Beulich |
2021-03-10 | x86: reuse further VEX entries for EVEX | Jan Beulich |
2021-03-10 | x86: reuse VEX entries for EVEX vperm{q,pd} | Jan Beulich |
2021-03-10 | x86: re-arrange order of decode for various EVEX opcodes | Jan Beulich |
2020-07-14 | x86: drop Rdq, Rd, and MaskR | Jan Beulich |
2020-07-14 | x86: simplify decode of opcodes valid with (embedded) 66 prefix only | Jan Beulich |
2020-07-14 | x86: drop further EVEX table entries that can be served by VEX ones | Jan Beulich |
2020-07-06 | x86: drop EVEX table entries that can be made served by VEX ones | Jan Beulich |
2020-07-06 | x86: honor VEX.W for VCVT{PH2PS,PS2PH} | Jan Beulich |
2020-07-06 | x86: drop EVEX table entries that can be served by VEX ones | Jan Beulich |
2020-06-09 | x86: utilize X macro in EVEX decoding | Jan Beulich |
2019-06-21 | i386: Break i386-dis-evex.h into small files | H.J. Lu |
2019-06-19 | i386: Check vector length for EVEX broadcast instructions | H.J. Lu |
2019-06-17 | i386: Check vector length for vshufXXX/vinsertXXX/vextractXXX | H.J. Lu |
2019-06-05 | i386: Check vector length for EVEX vextractfXX and vinsertfXX | H.J. Lu |
2019-06-04 | Enable Intel AVX512_VP2INTERSECT insn | H.J. Lu |
2019-04-05 | x86: Support Intel AVX512 BF16 | Xuepeng Guo |
2018-11-06 | x86: correctly handle VPBROADCASTD with EVEX.W set outside of 64-bit mode | Jan Beulich |
2018-11-06 | x86: correctly handle VMOVD with EVEX.W set outside of 64-bit mode | Jan Beulich |
2018-11-06 | x86: adjust {,E}VEX.W handling for PEXTR* / PINSR* | Jan Beulich |
2018-09-17 | x86: Set EVex=2 on EVEX.128 only vmovd and vmovq | H.J. Lu |
2018-09-14 | x86: Handle unsupported static rounding in vcvt[u]si2sd in 32-bit mode | H.J. Lu |
2018-09-14 | x86: Properly decode EVEX.W in vcvt[u]si2s[sd] in 32-bit mode | H.J. Lu |
2018-07-24 | x86-64: correct AVX512F vcvtsi2s{d,s} handling | Jan Beulich |
2017-11-14 | x86: add support for AVX-512 VPCMP*{B,W} pseudo-ops | Jan Beulich |
2017-10-23 | Enable Intel AVX512_BITALG instructions. | Igor Tsimbalist |