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path: root/opcodes/aarch64-dis.c
AgeCommit message (Expand)Author
2024-01-04Update year range in copyright notice of binutils filesAlan Modra
2023-09-26aarch64: Restructure feature flag handlingRichard Sandiford
2023-09-08Set insn_type for branch instructions on aarch64Vladimir Mezentsev
2023-08-22aarch64: Improve naming conventions for A and R-profile architectureVictor Do Nascimento
2023-03-30aarch64: Add the SME2 shift instructionsRichard Sandiford
2023-03-30aarch64: Add the SME2 saturating conversion instructionsRichard Sandiford
2023-03-30aarch64: Add the SME2 MLAL and MLSL instructionsRichard Sandiford
2023-03-30aarch64: Add the SME2 maximum/minimum instructionsRichard Sandiford
2023-03-30aarch64: Add the SME2 ADD and SUB instructionsRichard Sandiford
2023-03-30aarch64: Add the SME2 ZT0 instructionsRichard Sandiford
2023-03-30aarch64: Add the SME2 predicate-related instructionsRichard Sandiford
2023-03-30aarch64: Add the SME2 multivector LD1 and ST1 instructionsRichard Sandiford
2023-03-30aarch64: Add the SME2 MOVA instructionsRichard Sandiford
2023-03-30aarch64: Add a _10 suffix to FLD_imm3Richard Sandiford
2023-03-30aarch64: Add support for strided register listsRichard Sandiford
2023-03-30aarch64: Regularise FLD_* suffixesRichard Sandiford
2023-03-30aarch64: Try to report invalid variants against the closest matchRichard Sandiford
2023-03-30aarch64: Rename za_tile_vector to za_indexRichard Sandiford
2023-03-30aarch64: Make SME instructions use F_STRICTRichard Sandiford
2023-01-01Update year range in copyright notice of binutils filesAlan Modra
2022-07-29libopcodes/aarch64: add support for disassembler stylingAndrew Burgess
2022-06-29opcodes/aarch64: split off creation of comment text in disassemblerAndrew Burgess
2022-01-02Update year range in copyright notice of binutils filesAlan Modra
2021-12-03aarch64: Fix uninitialised memoryRichard Sandiford
2021-12-02aarch64: Enforce P/M/E order for MOPS instructionsRichard Sandiford
2021-12-02aarch64: Add support for +mopsRichard Sandiford
2021-11-25Fix building the AArch64 assembler and disassembler when assertions are disab...Nick Clifton
2021-11-17aarch64: [SME] SVE2 instructions added to support SMEPrzemyslaw Wirkus
2021-11-17aarch64: [SME] Add SME mode selection and state access instructionsPrzemyslaw Wirkus
2021-11-17aarch64: [SME] Add LD1x, ST1x, LDR and STR instructionsPrzemyslaw Wirkus
2021-11-17aarch64: [SME] Add MOV and MOVA instructionsPrzemyslaw Wirkus
2021-11-05Missing va_end in aarch64-dis.cAlan Modra
2021-03-31Use bool in opcodesAlan Modra
2021-03-31Remove bfd_stdint.hAlan Modra
2021-03-22Add startswith function and use it instead of CONST_STRNEQ.Martin Liska
2021-01-08Fix places in the AArch64 opcodes library code where a call to assert() has s...Nick Clifton
2021-01-01Update year range in copyright notice of binutils filesAlan Modra
2020-10-28aarch64: Add DSB instruction Armv8.7-a variantPrzemyslaw Wirkus
2020-09-08aarch64: Add support for Armv8-R system registersAlex Coplan
2020-09-08aarch64: Add base support for Armv8-RAlex Coplan
2020-08-21Fix problems with the AArch64 linker exposed by testing it with sanitization ...Nick Clifton
2020-04-20[AArch64, Binutils] Add missing TSB instructionSudakshina Das
2020-02-26Indent labelsAlan Modra
2020-01-01Update year range in copyright notice of binutils filesAlan Modra
2019-12-16ubsan: aarch64: left shift of negative valueAlan Modra
2019-12-11aarch64 disassembler infinite loopAlan Modra
2019-11-07[binutils][aarch64] Bfloat16 enablement [2/X]Matthew Malcomson
2019-07-01[gas][aarch64][SVE2] Fix pmull{t,b} requirement on SVE2-AESMatthew Malcomson
2019-05-09[binutils][aarch64] New sve_size_tsz_bhs iclass.Matthew Malcomson
2019-05-09[binutils][aarch64] New sve_shift_tsz_bhsd iclass.Matthew Malcomson
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