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path: root/opcodes/aarch64-asm.c
AgeCommit message (Expand)Author
2024-01-04Update year range in copyright notice of binutils filesAlan Modra
2023-03-30aarch64: Add the SME2 shift instructionsRichard Sandiford
2023-03-30aarch64: Add the SME2 saturating conversion instructionsRichard Sandiford
2023-03-30aarch64: Add the SME2 MLAL and MLSL instructionsRichard Sandiford
2023-03-30aarch64: Add the SME2 maximum/minimum instructionsRichard Sandiford
2023-03-30aarch64: Add the SME2 ADD and SUB instructionsRichard Sandiford
2023-03-30aarch64: Add the SME2 ZT0 instructionsRichard Sandiford
2023-03-30aarch64: Add the SME2 predicate-related instructionsRichard Sandiford
2023-03-30aarch64: Add the SME2 multivector LD1 and ST1 instructionsRichard Sandiford
2023-03-30aarch64: Add the SME2 MOVA instructionsRichard Sandiford
2023-03-30aarch64: Add support for predicate-as-counter registersRichard Sandiford
2023-03-30aarch64: Add a _10 suffix to FLD_imm3Richard Sandiford
2023-03-30aarch64: Regularise FLD_* suffixesRichard Sandiford
2023-03-30aarch64: Rename za_tile_vector to za_indexRichard Sandiford
2023-03-30aarch64: Make SME instructions use F_STRICTRichard Sandiford
2023-01-01Update year range in copyright notice of binutils filesAlan Modra
2022-10-17Allow explicit size specifier for predicate operand of {sq, uq, }{incp, decp}CaiJingtao
2022-01-02Update year range in copyright notice of binutils filesAlan Modra
2021-12-02aarch64: Add support for +mopsRichard Sandiford
2021-11-25Fix building the AArch64 assembler and disassembler when assertions are disab...Nick Clifton
2021-11-17aarch64: [SME] SVE2 instructions added to support SMEPrzemyslaw Wirkus
2021-11-17aarch64: [SME] Add SME mode selection and state access instructionsPrzemyslaw Wirkus
2021-11-17aarch64: [SME] Add LD1x, ST1x, LDR and STR instructionsPrzemyslaw Wirkus
2021-11-17aarch64: [SME] Add MOV and MOVA instructionsPrzemyslaw Wirkus
2021-04-19arm64: add two initializersJan Beulich
2021-03-31Use bool in opcodesAlan Modra
2021-01-08Fix places in the AArch64 opcodes library code where a call to assert() has s...Nick Clifton
2021-01-01Update year range in copyright notice of binutils filesAlan Modra
2020-10-28aarch64: Add DSB instruction Armv8.7-a variantPrzemyslaw Wirkus
2020-04-20[AArch64, Binutils] Add missing TSB instructionSudakshina Das
2020-02-26Indent labelsAlan Modra
2020-01-01Update year range in copyright notice of binutils filesAlan Modra
2019-11-07[binutils][aarch64] Bfloat16 enablement [2/X]Matthew Malcomson
2019-07-01[gas][aarch64][SVE2] Fix pmull{t,b} requirement on SVE2-AESMatthew Malcomson
2019-05-09[binutils][aarch64] New sve_size_tsz_bhs iclass.Matthew Malcomson
2019-05-09[binutils][aarch64] New sve_shift_tsz_bhsd iclass.Matthew Malcomson
2019-05-09[binutils][aarch64] New SVE_SHRIMM_UNPRED_22 operand.Matthew Malcomson
2019-05-09[binutils][aarch64] New sve_size_013 iclass.Matthew Malcomson
2019-05-09[binutils][aarch64] New sve_size_bh iclass.Matthew Malcomson
2019-05-09[binutils][aarch64] New sve_size_sd2 iclass.Matthew Malcomson
2019-05-09[binutils][aarch64] New iclass sve_size_hsd2.Matthew Malcomson
2019-01-25AArch64: Remove ldgv and stgv instructions from Armv8.5-A Memory Tagging Exte...Sudi Das
2019-01-01Update year range in copyright notice of binutils filesAlan Modra
2018-11-12[BINUTILS, AARCH64, 6/8] Add Tag getting instruction in Memory Tagging ExtensionSudakshina Das
2018-11-12[BINUTILS, AARCH64, 4/8] Add Tag setting instructions in Memory Tagging Exten...Sudakshina Das
2018-11-12[BINUTILS, AARCH64, 2/8] Add Tag generation instructions in Memory Tagging Ex...Sudakshina Das
2018-10-03AArch64: Constraint disassembler and assembler changes.Tamar Christina
2018-10-03AArch64: Wire through instr_sequenceTamar Christina
2018-05-15Implement Read/Write constraints on system registers on AArch64Tamar Christina
2018-05-15Modify AArch64 Assembly and disassembly functions to be able to fail and repo...Tamar Christina
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