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AgeCommit message (Expand)Author
2023-06-01RISC-V: PR30449, Add lga assembler macro support.Jim Wilson
2023-05-30LoongArch: gas: Add support for linker relaxation.mengqinggang
2023-05-30Don't define COFF_MAGICAlan Modra
2023-05-26x86-64: improve gas diagnostic when no 32-bit target is configuredJan Beulich
2023-05-26x86: figure braces aren't really part of mnemonicsJan Beulich
2023-05-26x86: de-duplicate operand_special_chars[] wrt extra_symbol_chars[]Jan Beulich
2023-05-23x86/Intel: address quoted-symbol related FIXMEsJan Beulich
2023-05-23x86: don't recognize quoted symbol names as registers or operatorsJan Beulich
2023-05-23Support Intel FRED LKGSZhang, Jun
2023-05-23Revert "Support Intel FRED LKGS"liuhongt
2023-05-23Support Intel FRED LKGSZhang, Jun
2023-05-19RISC-V: Support subtraction of .uleb128.Kuan-Lin Chen
2023-05-19x86: permit all relational operators in insn operandsJan Beulich
2023-05-19x86: further adjust extend-to-32bit-address conditionsJan Beulich
2023-05-19gas: invoke md_optimize_expr() also for unary expressionsJan Beulich
2023-05-19x86: tighten extend-to-32bit-address conditionsJan Beulich
2023-05-18PR11601, Solaris assembler compatibility doesn't workAlan Modra
2023-05-13PR28955 mips gas segfaultAlan Modra
2023-05-12x86: slightly simplify i386_parse_name()Jan Beulich
2023-05-12gas: equates of registersJan Beulich
2023-05-04RISC-V: tighten post-relocation-operator separator expectationJan Beulich
2023-05-04gas: fix building tc-bpf.c on s390xIlya Leoshkevich
2023-05-03Remove unused args from bfd_make_debug_symbolAlan Modra
2023-04-28x86/Intel: reduce ELF/PE conditional scope in x86_cons()Jan Beulich
2023-04-26gas: support for the BPF pseudo-c assembly syntaxGuillermo E. Martinez
2023-04-25RISC-V: adjust logic to avoid register name symbolsJan Beulich
2023-04-25RISC-V: don't recognize bogus relocationsJan Beulich
2023-04-25RISC-V: avoid redundant and misleading/wrong error messagesJan Beulich
2023-04-25RISC-V: drop "percent_op" parameter from my_getOpcodeExpression()Jan Beulich
2023-04-25RISC-V: minor effort reduction in relocation specifier parsingJan Beulich
2023-04-23MIPS: fix loongson3 llsc workaroundYunQiang Su
2023-04-19x86: parse_register() must not alter the parsed stringJan Beulich
2023-04-19x86: parse_real_register() does not alter the parsed stringJan Beulich
2023-04-18Symbols with GOT relocatios do not fix adjustbalemengqinggang
2023-04-07Support Intel AMX-COMPLEXHaochen Jiang
2023-04-03ubsan: aarch64 parse_vector_reg_listAlan Modra
2023-03-31RISC-V: Allocate "various" operand typeTsukasa OI
2023-03-31x86: handle immediate operands for .insnJan Beulich
2023-03-31x86: allow for multiple immediates in output_disp()Jan Beulich
2023-03-31x86: handle EVEX Disp8 for .insnJan Beulich
2023-03-31x86: process instruction operands for .insnJan Beulich
2023-03-31x86: parse special opcode modifiers for .insnJan Beulich
2023-03-31x86: parse VEX and alike specifiers for .insnJan Beulich
2023-03-31x86: introduce .insn directiveJan Beulich
2023-03-30aarch64: Add the RPRFM instructionRichard Sandiford
2023-03-30aarch64: Add new SVE dot-product instructionsRichard Sandiford
2023-03-30aarch64: Add the SME2 shift instructionsRichard Sandiford
2023-03-30aarch64: Add the SME2 MLALL and MLSLL instructionsRichard Sandiford
2023-03-30aarch64: Add the SME2 MLAL and MLSL instructionsRichard Sandiford
2023-03-30aarch64: Add the SME2 FMLA and FMLS instructionsRichard Sandiford