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| author | H.J. Lu <hjl.tools@gmail.com> | 2023-12-28 08:19:39 -0800 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2023-12-28 08:19:39 -0800 |
| commit | 5e2f0c9a5f3d467a341a0c3d579d9c6ee6daa4d1 (patch) | |
| tree | 79d48b23d4b7a1e6c4ae1101b83112c0d3cf6a73 | |
| parent | eccdc733a50980adc99178645ea4d5c2949c7e90 (diff) | |
gas: Mention initial support for Intel APX in NEWS
| -rw-r--r-- | gas/NEWS | 2 |
1 files changed, 2 insertions, 0 deletions
@@ -1,5 +1,7 @@ -*- text -*- +* Initial support for Intel APX: 32 GPRs, NDD, PUSH2/POP2 and PUSHP/POPP. + * On RISC-V macro instructions expanding to AUIPC and a load, store, or branch no longer accept x0 as an intermediate and/or destination register. |