cleanup

Signed-off-by: Vinod Koul <vkoul@kernel.org>

2 files changed, 1 insertions, 31 deletions

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
index c8c5bae1ccb1..c3eb3b584c56 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
@@ -76,60 +76,37 @@ static void dpu_hw_dsc_config(struct dpu_hw_dsc *hw_dsc,
 	data |= dsc->drm.slice_height;
 	DPU_REG_WRITE(c, DSC_SLICE, data);
 
-	pr_err("VK: check: dsc->drm.slice_chunk_size: %x\n", dsc->drm.slice_chunk_size);
 	data = DIV_ROUND_UP(dsc->drm.slice_width * dsc->drm.bits_per_pixel, 8) << 16;
 
 	DPU_REG_WRITE(c, DSC_CHUNK_SIZE, data);
 
 	data = dsc->drm.initial_dec_delay << 16;
 	data |= dsc->drm.initial_xmit_delay;
-
-	pr_err("VK: DSC_DELAY, data is:%x, expected:%x\n", data, 0x020E0200);
-	data = 0x020E0200; // XXX
 	DPU_REG_WRITE(c, DSC_DELAY, data);
 
 	data = dsc->drm.initial_scale_value;
-	pr_err("VK: DSC_SCALE_INITIAL data is:%x, expected:%x\n", data, 0x00000020);
-	data = 0x00000020; // XXX
 	DPU_REG_WRITE(c, DSC_SCALE_INITIAL, data);
 
 	data = dsc->drm.scale_decrement_interval;
-	pr_err("VK: DSC_SCALE_DEC_INTERVAL data is:%x, expected:%x\n", data, 0x00000007);
-	data = 0x00000007; // XXX
 	DPU_REG_WRITE(c, DSC_SCALE_DEC_INTERVAL, data);
 
-	data = dsc->drm.scale_increment_interval;
-	pr_err("VK: dsc->drm.scale_increment_interval: %x\n", dsc->drm.scale_increment_interval);
-	pr_err("VK: DSC_SCALE_INC_INTERVAL data is:%x, expected:%x\n", data, 0x00000184);
-	data = 0x00000184; // XXX
+	data = 0x00000184; /* only this value works */
 	DPU_REG_WRITE(c, DSC_SCALE_INC_INTERVAL, data);
 
 	data = dsc->drm.first_line_bpg_offset;
-	pr_err("VK: DSC_FIRST_LINE_BPG_OFFSET data is:%x, expected:%x\n", data, 0x0000000C);
-	data = 0x0000000C; // XXX
 	DPU_REG_WRITE(c, DSC_FIRST_LINE_BPG_OFFSET, data);
 
 	data = dsc->drm.nfl_bpg_offset << 16;
 	data |= dsc->drm.slice_bpg_offset;
-
-	pr_err("VK: DSC_BPG_OFFSET data is:%x, expected:%x\n", data, 0x0667065c);
-	data = 0x0667065c; // XXX
 	DPU_REG_WRITE(c, DSC_BPG_OFFSET, data);
 
 	data = dsc->drm.initial_offset << 16;
 	data |= dsc->drm.final_offset;
-
-	pr_err("VK: DSC_DSC_OFFSET data is:%x, expected:%x\n", data, 0x180010F0);
-	data = 0x180010F0; // XXX
 	DPU_REG_WRITE(c, DSC_DSC_OFFSET, data);
 
-	pr_err("VK: check threasH %d, max: %d, min: %d\n", dsc->det_thresh_flatness, dsc->drm.flatness_max_qp, dsc->drm.flatness_min_qp);
 	data = dsc->det_thresh_flatness << 10;
 	data |= dsc->drm.flatness_max_qp << 5;
 	data |= dsc->drm.flatness_min_qp;
-
-	pr_err("VK: DSC_FLATNESS data is:%x, expected:%x\n", data, 0x00001d83);
-	data = 0x00001d83;
 	DPU_REG_WRITE(c, DSC_FLATNESS, data);
 
 	data = dsc->drm.rc_model_size;
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index aedd595d9af9..39ab9ff6232c 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -1067,7 +1067,6 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_dual_dsi)
 			slice_per_intf = DIV_ROUND_UP(hdisplay, dsc->drm.slice_width);
 			bytes_in_slice = DIV_ROUND_UP(dsc->drm.slice_width * dsc->drm.bits_per_pixel, 8);
 			dsc->drm.slice_chunk_size = bytes_in_slice;
-			pr_err("VK: bytes_in_slice is %x:%x\n", bytes_in_slice, dsc->drm.slice_chunk_size);
 			total_bytes_per_intf = dsc->bytes_in_slice * slice_per_intf;
 			dsc->pkt_per_line = slice_per_intf / dsc->slice_per_pkt;
 
@@ -1890,15 +1889,9 @@ static int dsi_populate_dsc_params(struct msm_display_dsc_config *dsc)
 	}
 
 	dsc->drm.initial_offset = 6144;
-	dsc->drm.final_offset = 4336;
 	dsc->drm.initial_xmit_delay = 512;
-	dsc->drm.initial_dec_delay = 526;
 	dsc->drm.initial_scale_value = 32;
-	dsc->drm.scale_decrement_interval = 7;
-	dsc->drm.scale_increment_interval = 388;
 	dsc->drm.first_line_bpg_offset = 12;
-	dsc->drm.nfl_bpg_offset = 1639;
-	dsc->drm.slice_bpg_offset = 1628;
 	dsc->drm.line_buf_depth = dsc->drm.bits_per_component + 1;
 
 	/* bpc 8 */