| Age | Commit message (Collapse) | Author |
|---|
|
Add per-worker thread private data to all shader calls
Add per-worker sampler cache and jit context
Add late LoadTexel JIT support
Add per-worker-thread Sampler / LoadTexel JIT
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Move filtering of redundant codegen operations into gen scripts themselves
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Add support for double-pumping a smaller SIMD width intrinsic.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Allows direct use of enum values in conversion to template args.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Add support for generic VGATHERPD intrinsic in x86 lowering pass.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Support generic VCVTPD2PS and VCVTPH2PS in x86 lowering pass.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Fix issue where temporary allocas were getting hoisted to function entry
unnecessarily. We now explicitly mark temporary allocas and skip hoisting
during the hoist pass. Shuold reduce stack usage.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Changing type to gfxptr for indices and related changes to fetch and mem
builder code.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
for JIT compilation
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Needed because some FP paths (namely stipple) use gather intrinsics
that now need to be lowered to x86.
v2: fix typo in commit message
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Enable generalized fetch jit with 8 or 16 wide SIMD target. Still some
work needed to remove some simd8 double pumping for 16-wide target.
Also removed unused non-gather load vertices path.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Abstract usage scenarios for memory accesses into builder_gfx_mem.
Builder_gfx_mem will convert gfxptr_t from 64-bit int to regular pointer
types for use by builder_mem.
v2: reworded commit message; renamed enum more appropriately
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Some more work to do before we can support simultaneous 8-wide and
16-wide and remove the VGATHERPS_16 version.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Small cleanup. Remove convenience types from JitManager and standardize
on the Builder's convenience types.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Add support for providing an emulation callback function for arch/width
combinations that don't map cleanly to an x86 intrinsic.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Move x86 intrinsic lowering to a separate pass. Builder now instantiates
generic intrinsics for features not supported by llvm. The separate x86
lowering pass is responsible for lowering to valid x86 for the target
SIMD architecture. Currently it's a port of existing code to get it
up and running quickly. Will eventually support optimized x86 for AVX,
AVX2 and AVX512.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Removed preprocessor defines from structures passed to LLVM jitted code.
The python scripts do not understand the preprocessor defines and ignores
them. So for fields that are compiled out due to a preprocessor define
the LLVM script accounts for them anyway because it doesn't know what
the defines are set to. The sanitize defines for open source are fine
in that they're safely used.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Needed work for jit code debug.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Hook up archrast counters for shader stats: instructions executed.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Removing some code that doesn't seem to do anything meaningful.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Added a SWR_SHADER_STATS structure which is passed to each shader. The
stats pass will instrument the shader to populate this.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
mem[offset] += value
This function will be heavily used by all stats intrinsics.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Fix slow permutes in PA tri lists under SIMD16 emulation on AVX
Added missing permute (interlane, immediate) to SIMDLIB
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Finish up the remaining explicit intrinsic uses. At this point all
explicit Intrinsic::getDeclaration() usage has been replaced with auto
generated macros generated with gen_llvm_ir_macros.py. Going forward,
make sure to only use the intrinsics here, adding new ones as needed.
Next step is to remove all references to x86 intrinsics to keep the
builder target-independent. Any x86 lowering will be handled by a
separate pass.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Replace sqrt, maskload, fp min/max, cttz, ctlz with llvm equivalent.
Replace AVX maskedstore intrinsic with LLVM intrinsic. Add helper llvm
macros for stacksave, stackrestore, popcnt.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Start removing avx2 macros for functionality that exists in llvm.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
for getting masked gather intrinsic (also compatible with LLVM 4)
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Add stats for degenerate and backfacing primitive counts
Wire archrast stats for alpha blend and alpha test.
pass value to jitter, upon return have archrast event increment a value
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Help support debug info in 16 wide shaders.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Stuff parameters into a blend context struct before passing down through
the PFN_BLEND_JIT_FUNC function pointer. Needed for stat changes.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Add assert for correct usage of memory accesses
v2: reworded commit message; renamed enum more appropriately
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
VPHADDD, PMAXUD, PMINUD
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
|
|
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
|
|
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit a1c421c638fd9ff2810b2a59f1ccd0a3a03657b1)
|
|
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit 8bd719e3faee8cb0054f51cf1fe9d372a9eea0ea)
|
|
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
|
|
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit cf0864dc63caf1285bdede364e9a39b22bac5938)
|
|
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit 6d88ea9dd46e630ee861e773dfe4a49f5d1c1fbd)
|
|
This reverts commit 6217eedc9bac86856d5048c43b5f5a3f6976c13e.
I was using this for testing and accidentally put it on master
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
|
