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Conflicts:
arch/arm/boot/dts/dra72x.dtsi
arch/arm/boot/dts/dra74x.dtsi
Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Adding support for using generic of_clk_init caused an issue with retrying
clock init, in such way that retry init was never attempted for failed
clocks. Fixed by exporting the retry init call into its own driver API,
and calling this after of_clk_init from low level IO init.
Fixes: e80e55ebbf2856614 ("clk: ti: change clock init to use generic of_clk_init")
Reported-by: Carlos Hernandez <ceh@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
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Pass wkup_m3 device to the rproc_ready callback so that the driver user
can have a reference to the wkup_m3.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
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Introduce wkup_m3_copy_aux_data to give users of wkup_m3_rproc the
ability to copy data to a predefined data region that can be accessed by
the firmware running on the CM3.
Aux Data region is defined as the last 255 bytes of the DMEM used by the
wkup_m3.
Useful for providing i2c sequences to the CM3 firmware for scaling PMIC
voltages during low power modes.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
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Add rtc_only support.
Signed-off-by: Keerthy <j-keerthy@ti.com>
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The clock/dpll registers are in the WKUP power domain. Under both RTC-only
suspend and hibernation, these registers are lost.
Signed-off-by: Russ Dill <Russ.Dill@ti.com>
[j-keerthy@ti.com] ported to 3.14 with quite a bit of rework
Signed-off-by: Keerthy <j-keerthy@ti.com>
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This allows platform data to specify which power rails should be on or off
during RTC only suspend. This is necessary to keep DDR state while in RTC
only suspend.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
[j-keerthy@ti.com] ported to 3.14 with minor fixes
Signed-off-by: Keerthy <j-keerthy@ti.com>
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context.
It isn't much of a win, and with hibernation, everything loses context.
Signed-off-by: Russ Dill <Russ.Dill@ti.com>
[j-keerthy@ti.com] ported to 3.14
Signed-off-by: Keerthy <j-keerthy@ti.com>
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This adds a pair of context save/restore functions to save/restore the state
of a set of pinctrl registers. This simplifies some of the AM33XX PM code as
some of the pinctrl registers are lost when the per power domain loses power.
The pincrtl code can perform the necessary save/restore.
This will also be necessary for hibernation and RTC only sleep, as all
pinctrl registers all lost.
Signed-off-by: Russ Dill <Russ.Dill@gmail.com>
[t-kristo@ti.com: dropped unnecessary code]
Signed-off-by: Tero Kristo <t-kristo@ti.com>
[j-keerthy@ti.com] ported to 3.14
Signed-off-by: Keerthy <j-keerthy@ti.com>
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Many RTCs provide scratch registers that are maintained so long as the RTC
has power. Provide a generic method to access these registers.
Signed-off-by: Russ Dill <Russ.Dill@ti.com>
[j-keerthy@ti.com] ported to 3.14
Signed-off-by: Keerthy <j-keerthy@ti.com>
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This allows the TPS to be used with RTC only suspend/resume, otherwise
it powers off when attempting suspend.
Signed-off-by: Russ Dill <Russ.Dill@ti.com>
[j-keerthy@ti.com] ported to 3.14 with minor fixes
Signed-off-by: Keerthy <j-keerthy@ti.com>
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Previously, the TI clock driver initialized all the clocks hierarchically
under each separate clock provider node. Now, each clock that requires
IO access will instead check their parent node to find out which IO range
to use.
This patch allows the TI clock driver to use a few new features provided
by the generic of_clk_init, and also allows registration of clock nodes
outside the clock hierarchy (for example, any external clocks.)
This patch also effectively reverts cf345a4e7213d0a662683591dcec6779832da67e
as the retry mechanism for clockdomain init is no longer needed.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Jyri Sarha <jsarha@ti.com>
Tested-by: Jyri Sarha <jsarha@ti.com>
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In some socs dma requests lines from the peripherals to the
dma controller can be connected either directly or through
a crossbar router. The crossbar in turn maps the peripheral
request line to a free dma-controller request line. In such
cases the crossbar associated with the particular request lines
has to configured.
This add two APIS, one to register the crossbar router and other
to retrieve the router associated with a dma request line. The
peripheral's dma-specs mentions the dma-controller, request-line and
also the IP to which it is connected to via DT.
The dma-controller will have to check if a request line is routed
and then use that router's map/unmap function to configure the
request line.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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Add pinctrl data for ddr_vtt_toggle pin so that it is configured
for proper state during DeepSleep0. The pin should enter DS0 off mode
and hold the line low so VTT regulator is kept off while suspended.
It is also important for the PULLUP to be set on this pin so that
on removal of isolation, the VTT line is pulled high as a requirement
for bringing the DDR3 out of self-refresh.
This toggling is dependent on the IO isolation controlled by the
wkup_m3. Without placing the IOs into isolation the DS0 states set for
the pin will not be latched into effect during suspend.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
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Add a remoteproc driver to load the firmware for and boot the wkup_m3
present on am33xx. The wkup_m3 is an integrated Cortex M3 that allows
the SoC to enter the lowest possible power state by taking control from
the MPU after it has gone into its own low power state and shutting off
any additional peripherals.
Communication between the MPU and CM3 is handled by several IPC
registers in the control module and a mailbox. An API is exposed for
programming the aforementioned IPC registers and notifying the wkup_m3
of pending data using the mailbox. The wkup_m3 has the ability to
trigger an interrupt back to the MPU to allow for bidirectional
communication through these registers.
Two callbacks are provided. rproc_ready allows code to hook into the
driver to see when firmware has been loaded and execute other code and
txev_handler allows external code to run when the wkup_m3 triggers an
interrupt back to the m3.
The driver expects a resource table to be present in the wkup_m3 to
define the required memory resources needed by wkup_m3, at least the
data memory so that the firmware can be copied for the proper place for
execution.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
CC: Ohad Ben-Cohen <ohad@wizery.com>
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Use pdata-quirks to reset the wkup_m3 during boot.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
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pm-ti-linux-3.14.y-next
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pm-ti-linux-3.14.y-next
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Conflicts:
arch/arm/boot/dts/am43x-epos-evm.dts
Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Retry init is needed if clockdomains are registered before the corresponding
clocks are ready. In this case, the clockdomain info is added to a list
which will be processed once the clockdomains for next PRCM module are
processed.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
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OMAP4 and AM33XX share the same EMIF controller IP. Although there
are significant differences in the IP integration due to which
AM33XX can't reuse the EMIF driver DVFS similar to OMAP4,
it can definitely benefit by reusing the EMIF related macros
defined in drivers/memory/emif.h.
In the current OMAP PM framework the PM code resides under
arch/arm/mach-omap2/. To enable reuse of the register defines move
the register defines in the emif header file to include/linux so that
both the EMIF driver and the AM33XX PM code can benefit.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Reviewed-by: Russ Dill <russ.dill@ti.com>
Acked-by: Santosh Shililmar <santosh.shilimkar@ti.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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'nmenon-platform/v3.14/devel/suspend-j6-o5-j6eco-pm-branch' into pm-ti-linux-3.14.y-next
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[ Upstream commit e28867eab7c0a60cddf0cb59f9f6cbbd9561425d ]
Multiple platforms need to set CPU to a particular frequency before suspending
system. And so they need a common infrastructure which is provided by this
patch. Those platforms just need to initialize their ->suspend() pointers with
the generic routine.
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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[ Upstream commit 2f0aea9363609433b38ab13f0f86f38372668c68 ]
This patch adds cpufreq suspend/resume calls to dpm_{suspend|resume}() for
handling suspend/resume of cpufreq governors.
Lan Tianyu (Intel) & Jinhyuk Choi (Broadcom) found an issue where tunables
configuration for clusters/sockets with non-boot CPUs was getting lost after
suspend/resume, as we were notifying governors with CPUFREQ_GOV_POLICY_EXIT on
removal of the last cpu for that policy and so deallocating memory for tunables.
This is fixed by this patch as we don't allow any operation on governors after
device suspend and before device resume now.
We could have added these callbacks at dpm_{suspend|resume}_noirq() level but
the problem here is that most of the devices (i.e. devices with ->suspend()
callbacks) have already been suspended by now and so if drivers want to change
frequency before suspending, then it might not be possible for many platforms
(which depend on other peripherals like i2c, regulators, etc).
Reported-and-tested-by: Lan Tianyu <tianyu.lan@intel.com>
Reported-by: Jinhyuk Choi <jinchoi@broadcom.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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The OMAP mailbox driver and its existing clients (remoteproc
for OMAP4+ and TI DSP/Bridge for OMAP3) are adapted to use
the generic mailbox framework.
The main changes for the adaptation are:
- The tasklet used for Tx is replaced with the state machine from
the generic mailbox framework. The workqueue used for processing
the received messages stays intact for minimizing the effects on
the OMAP mailbox clients.
- The existing exported client API, omap_mbox_get, omap_mbox_put and
omap_mbox_send_msg are deleted, as the framework provides equivalent
functionality. A OMAP-specific omap_mbox_request_channel is added
though to support non-DT way of requesting mailboxes.
- The OMAP mailbox driver is integrated with the mailbox framework
through the proper implementations of mbox_chan_ops, except for
.last_tx_done and .peek_data. The OMAP mailbox driver does not need
these ops, as it is completely interrupt driven.
- The OMAP mailbox driver uses a custom of_xlate controller ops that
allows phandles for the pargs specifier instead of indexing to avoid
any channel registration order dependencies.
- The new framework does not support multiple clients operating on a
single channel, so the reference counting logic is simplified.
- The remoteproc and tidspbridge drivers (current clients) are adapted
to use the new API. The notifier callbacks used within these clients
are replaced with the regular callbacks from the newer framework.
- The exported OMAP mailbox API are limited to omap_mbox_save_ctx,
omap_mbox_restore_ctx, omap_mbox_enable_irq & omap_mbox_disable_irq,
with the signature modified to take in the new mbox_chan handle instead
of the OMAP specific omap_mbox handle. The first 2 will be removed when
the OMAP mailbox driver is adapted to runtime_pm. The other exported
API omap_mbox_request_channel will be removed once OMAP3 becomes DT-boot
only.
Cc: Jassi Brar <jassisinghbrar@gmail.com>
Cc: Ohad Ben-Cohen <ohad@wizery.com>
Cc: Omar Ramirez Luna <omar.ramirez@copitl.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Suman Anna <s-anna@ti.com>
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Introduce common framework for client/protocol drivers and
controller drivers of Inter-Processor-Communication (IPC).
Client driver developers should have a look at
include/linux/mailbox_client.h to understand the part of
the API exposed to client drivers.
Similarly controller driver developers should have a look
at include/linux/mailbox_controller.h
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
[s-anna@ti.com: fixed a checkpatch warning]
Signed-off-by: Suman Anna <s-anna@ti.com>
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The patch 30058677 "ARM / highbank: add support for pl320 IPC"
added a pl320 IPC specific header file as a generic mailbox.h.
This file has been renamed appropriately to allow the
introduction of the generic mailbox API framework.
Acked-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
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The DRA74/72 control module pins have a weak pull up and pull down.
This is configured by bit offset 17. if BIT(17) is 1, a pull up is
selected, else a pull down is selected.
However, this pull resisstor is applied based on BIT(16) -
PULLUDENABLE - if BIT(18) is *0*, then pull as defined in BIT(17) is
applied, else no weak pulls are applied. We defined this in reverse.
Reference: Table 18-5 (Description of the pad configuration register
bits) in Technical Reference Manual Revision (DRA74x revision Q:
SPRUHI2Q Revised June 2014 and DRA72x revision F: SPRUHP2F - Revised
June 2014)
Signed-off-by: Nishanth Menon <nm@ti.com>
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Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
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The *rdev[] is not used since commit 413be59e2f333
"regulator: tps65218: Remove unnecessary regulator_unregister call".
[ Upstream commit 3176a521922b8ebcf7a593063cc55344486d2cd7]
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Keerthy <j-keerthy@ti.com>
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A remote processor may need to load certain firmware sections into
internal memories (eg: RAM at L1 or L2 levels) for performance or
other reasons. Introduce a new resource type (RSC_INTMEM) and add
an associated handler function to handle such memories. The handler
creates a kernel mapping for the resource's 'pa' (physical address).
Note that no iommu mapping is performed for this resource, as the
resource is primarily used to represent physical internal memories.
If the internal memory region can only be accessed through an iommu,
a devmem resource entry should be used instead.
Signed-off-by: Robert Tivy <rtivy@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
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The remoteproc driver core currently relies on iommu_present() on
the bus the device is on, to perform MMU management. However, this
logic doesn't scale for multi-arch, especially for processors that
do not have an IOMMU. Replace this logic instead by using a h/w
capability flag for the presence of IOMMU in the rproc structure.
The individual platform implementations are required to set this
flag appropriately. The default setting is to not have an MMU.
The OMAP remoteproc driver is updated while at this, to maintain
the functionality with the IOMMU detection logic change in this
patch.
Cc: Sjur Brændeland <sjur.brandeland@stericsson.com>
Cc: Robert Tivy <rtivy@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
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[ Upstream commit 596c471b69249764d8e241b004736878204daa0f ]
Export the DMA register information from the SoC specific data, such
that we can access the registers directly in omap-dma.c, mapping the
register region ourselves as well.
Rather than calculating the DMA channel register in its entirety for
each access, we pre-calculate an offset base address for the allocated
DMA channel and then just use the appropriate register offset.
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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[ Upstream commit 9834f81314b2a5b1bb3cd0d8f46e61528b60d580 ]
This really needs to be there, because otherwise the plat-omap code can
kfree() this data structure, and then re-use the pointer later.
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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[ Upstream commit 64a2dc3d3de4235eb73921d870a674a23d9888f0 ]
We can do much better with this by using a structure to describe each
register, rather than code.
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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[ Upstream commit e38b1485fde832f72ab478f947f6e78a8e28c58b ]
The disable_irq_lch method is never actually used, so there's not much
point it existing; remove it.
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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[ Upstream commit b9e97822da374f52aaf99cb502f531ff2184b8f5 ]
Program the transfer parameters directly into the hardware, rather
than using the functions in arch/arm/plat-omap/dma.c.
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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[ Upstream commit 1b416c4b41351c3eb8fc42dbb4cd8eba463c0813 ]
Provide and use a hook to obtain the underlying DMA platform operations
so that omap-dma.c can access the hardware more directly without
involving the legacy DMA driver.
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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commit 44b4dc616365d7897808555d415099330e3af9df upstream.
The TPS65218 chip is a power management IC for Portable Navigation Systems
and Tablet Computing devices. It contains the following components:
- Regulators.
- Over Temperature warning and Shut down.
This patch adds support for tps65218 mfd device. At this time only
the regulator functionality is made available.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Felipe Balbi <balbi@ti.com>
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reg_info is a generic term which might cause conflict at a later point
in time. To prevent such a thing from occuring in future, rename to
palmas_reg_info.
Signed-off-by: Nishanth Menon <nm@ti.com>
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'nmenon/v3.14/never-upstream/power/voltagedomain' into pm-ti-linux-3.14.y-next
Conflicts:
arch/arm/boot/dts/dra7.dtsi
drivers/cpufreq/cpufreq-cpu0.c
Signed-off-by: Tero Kristo <t-kristo@ti.com>
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we have currently 2 DMA drivers that try to co-exist.
drivers/dma/omap-dma.c which registers it's own IRQ and is device tree
aware and uses arch/arm/plat-omap/dma.c instance created by
arch/arm/mach-omap2/dma.c to maintain channel usage (omap_request_dma).
Currently both try to register interrupts and mach-omap2/plat-omap dma.c
attempts to use the IRQ number registered by hwmod to register it's own
interrupt handler.
Now, there is no reasonable way of static allocating DMA irq in GIC
SPI when we use crossbar. However, since the dma_chan structure is
freed as a result of IRQ not being present due to devm allocation,
maintaining information of channel by platform code fails at a later
point in time when that region of memory is reused.
So, if hwmod does not indicate an IRQ number, then, assume that
dma-engine will take care of the interrupt handling.
Signed-off-by: Nishanth Menon <nm@ti.com>
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Add palmas_pmic_driver_data structure.
Signed-off-by: Keerthy <j-keerthy@ti.com>
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the header file
shift the palmas_sleep_requestor_info structure definition to the header file.
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Keerthy <j-keerthy@ti.com>
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Shift the reg_info structure definition to the header file.
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Keerthy <j-keerthy@ti.com>
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Add tps65917 specific definitions and enums.
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Keerthy <j-keerthy@ti.com>
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[ Upstream commit ca5d1b3524b4d90a2e2f1f71583c1dca6b96fd92 ]
This patch extends the regulator helpers to account for device that use
multiple bits for control when using regmap enable/disable/bypass ops.
The actual regulator helpers wrongly assume that the regulator control
is always performed using single bits, using in the regulator_desc
struct only two parameters *_reg and *_mask defining register and mask
for control.
This patch extends this struct and introduces the helpers to take into
account devices where control is performed using multiple bits and
specific multi-bit values are used for enabling/disabling/bypassing the
regulator.
Signed-off-by: Carlo Caione <carlo@caione.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
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[ Upstream commit 6796cb16c088905bf3af40548fda68c09e6f6ee5 ]
DRM drivers share a common address_space across all character-devices of a
single DRM device. This allows simple buffer eviction and mapping-control.
However, DRM core currently waits for the first ->open() on any char-dev
to mark the underlying inode as backing inode of the device. This delayed
initialization causes ugly conditions all over the place:
if (dev->dev_mapping)
do_sth();
To avoid delayed initialization and to stop reusing the inode of the
char-dev, we allocate an anonymous inode for each DRM device and reset
filp->f_mapping to it on ->open().
Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
Signed-off-by: Darren Etheridge <detheridge@ti.com>
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[ Upstream commit 24f13a6679c9b75687f3ae48994e42071d4e9fce ]
If LPAE is enabled, dma_addr_t is 64 bit, so we have to
change a few type for everything in this driver to match
again.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: linux-fbdev@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Darren Etheridge <detheridge@ti.com>
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[ Upstream commit 68bab8662f49b9e158f1d32f11becd4e48c04079 ]
In certain boards the source for the clk32k clock can be gated. In these
boards the clk32k clock can be provided to the driver and it is going to be
enabled/disabled when it is needed.
If the clk32k clock is not provided the driver will assume that it is always
running.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Darren Etheridge <detheridge@ti.com>
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