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authorDave Gerlach <d-gerlach@ti.com>2014-10-06 16:47:18 -0500
committerTero Kristo <t-kristo@ti.com>2014-10-09 11:32:32 +0300
commit47f9e608d62ccb228afb934e0d7ffe1fe996b1ca (patch)
tree28ed13666f9fe045fcee06f12adb2ca01d6d6c33 /arch
parent0aef69e6e5607c9334657a475e2f8032c1e1d8b2 (diff)
ARM: OMAP2: sleep43xx: Access registers to avoid TLB miss
Access the three registers that we need to access after EMIF is placed in DDR to make sure they are present in TLB to avoid a miss and walk of page table in DDR, which is not possible once DDR is shut off and will lead to a hang in suspend path if attempted. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-omap2/sleep43xx.S9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/sleep43xx.S b/arch/arm/mach-omap2/sleep43xx.S
index 9444fd4a5f1..d7fbbec741e 100644
--- a/arch/arm/mach-omap2/sleep43xx.S
+++ b/arch/arm/mach-omap2/sleep43xx.S
@@ -218,6 +218,15 @@ sync:
bne sync
#endif
+ ldr r1, am43xx_virt_mpu_clkctrl
+ ldr r2, [r1]
+
+ ldr r1, am43xx_virt_mpu_clkstctrl
+ ldr r2, [r1]
+
+ ldr r1, am43xx_virt_emif_clkctrl
+ ldr r2, [r1]
+
ldr r0, emif_addr_virt
/* Put SDRAM in self-refresh */
ldr r1, [r0, #EMIF_POWER_MANAGEMENT_CONTROL]