diff options
| author | Sumit Garg <sumit.garg@linaro.org> | 2020-05-05 12:45:07 +0530 |
|---|---|---|
| committer | Sumit Garg <sumit.garg@linaro.org> | 2020-05-05 12:01:36 +0100 |
| commit | 79c6e5d93216ee2629f878eb231ffa1689804157 (patch) | |
| tree | fa8c3dd0a076f8ef40d7f5b39517333039db8e81 | |
| parent | e6c9fb33cbde76be03f563b99930379d735ad2fc (diff) | |
irqchip/gic-v3: Enable support for SGIs to act as NMIs
Add support to handle SGIs as regular NMIs. As SGIs defaults to a fixed
arch specific handler so skip NMI handler update.
Also, enable NMI support prior to gic_smp_init() as allocation of SGIs
as IRQs/NMIs happen as part of this routine.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
| -rw-r--r-- | drivers/irqchip/irq-gic-v3.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index e1ae57bba71d..223c58a0bdb6 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -473,6 +473,11 @@ static int gic_irq_nmi_setup(struct irq_data *d) if (WARN_ON(gic_irq(d) >= 8192)) return -EINVAL; + if (get_intid_range(d) == SGI_RANGE) { + gic_irq_set_prio(d, GICD_INT_NMI_PRI); + return 0; + } + /* desc lock should already be held */ if (gic_irq_in_rdist(d)) { u32 idx = gic_get_ppi_index(d); @@ -510,6 +515,11 @@ static void gic_irq_nmi_teardown(struct irq_data *d) if (WARN_ON(gic_irq(d) >= 8192)) return; + if (get_intid_range(d) == SGI_RANGE) { + gic_irq_set_prio(d, GICD_INT_DEF_PRI); + return; + } + /* desc lock should already be held */ if (gic_irq_in_rdist(d)) { u32 idx = gic_get_ppi_index(d); @@ -1702,6 +1712,7 @@ static int __init gic_init_bases(void __iomem *dist_base, gic_dist_init(); gic_cpu_init(); + gic_enable_nmi_support(); gic_smp_init(); gic_cpu_pm_init(); @@ -1713,8 +1724,6 @@ static int __init gic_init_bases(void __iomem *dist_base, gicv2m_init(handle, gic_data.domain); } - gic_enable_nmi_support(); - return 0; out_free: |