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| author | Vikram Kanigiri <vikram.kanigiri@arm.com> | 2014-05-13 14:42:08 +0100 |
|---|---|---|
| committer | Vikram Kanigiri <vikram.kanigiri@arm.com> | 2014-05-22 15:42:09 +0100 |
| commit | 23ff9baa7e01eac3a451f2e8ed768c9b90d3567a (patch) | |
| tree | 93feb21b2f81d70f93e5e852cecbddb6fb1ba329 /services | |
| parent | ec786cbca93651b06431e1933abb909626949644 (diff) | |
Introduce macros to manipulate the SPSR
This patch introduces macros (SPSR_64 and SPSR_32) to
create a SPSR for both aarch32 and aarch64 execution
states. These macros allow the user to set fields
in the SPSR depending upon its format.
The make_spsr() function which did not allow
manipulation of all the fields in the aarch32 SPSR
has been replaced by these new macros.
Change-Id: I9425dda0923e8d5f03d03ddb8fa0e28392c4c61e
Diffstat (limited to 'services')
| -rw-r--r-- | services/spd/tspd/tspd_common.c | 2 | ||||
| -rw-r--r-- | services/std_svc/psci/psci_common.c | 21 |
2 files changed, 8 insertions, 15 deletions
diff --git a/services/spd/tspd/tspd_common.c b/services/spd/tspd/tspd_common.c index a4c39363..d3fe5ddf 100644 --- a/services/spd/tspd/tspd_common.c +++ b/services/spd/tspd/tspd_common.c @@ -91,7 +91,7 @@ int32_t tspd_init_secure_context(uint64_t entrypoint, tsp_ctx->mpidr = mpidr; cm_set_context(mpidr, &tsp_ctx->cpu_ctx, SECURE); - spsr = make_spsr(MODE_EL1, MODE_SP_ELX, rw); + spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); cm_set_el3_eret_context(SECURE, entrypoint, spsr, scr); return 0; diff --git a/services/std_svc/psci/psci_common.c b/services/std_svc/psci/psci_common.c index f24a2f02..025d8b43 100644 --- a/services/std_svc/psci/psci_common.c +++ b/services/std_svc/psci/psci_common.c @@ -303,6 +303,7 @@ int psci_set_ns_entry_info(unsigned int index, unsigned int rw, mode, ee, spsr = 0; unsigned long id_aa64pfr0 = read_id_aa64pfr0_el1(), scr = read_scr(); unsigned long el_status; + unsigned long daif; /* Figure out what mode do we enter the non-secure world in */ el_status = (id_aa64pfr0 >> ID_AA64PFR0_EL2_SHIFT) & @@ -330,24 +331,18 @@ int psci_set_ns_entry_info(unsigned int index, ee = read_sctlr_el1() & SCTLR_EE_BIT; } - spsr = DAIF_DBG_BIT | DAIF_ABT_BIT; - spsr |= DAIF_IRQ_BIT | DAIF_FIQ_BIT; - spsr <<= PSR_DAIF_SHIFT; - spsr |= make_spsr(mode, MODE_SP_ELX, !rw); + spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); psci_ns_entry_info[index].sctlr |= ee; psci_ns_entry_info[index].scr |= SCR_RW_BIT; } else { - /* Check whether aarch32 has to be entered in Thumb mode */ - if (entrypoint & 0x1) - spsr = SPSR32_T_BIT; if (el_status && (scr & SCR_HCE_BIT)) { - mode = AARCH32_MODE_HYP; + mode = MODE32_hyp; ee = read_sctlr_el2() & SCTLR_EE_BIT; } else { - mode = AARCH32_MODE_SVC; + mode = MODE32_svc; ee = read_sctlr_el1() & SCTLR_EE_BIT; } @@ -355,11 +350,9 @@ int psci_set_ns_entry_info(unsigned int index, * TODO: Choose async. exception bits if HYP mode is not * implemented according to the values of SCR.{AW, FW} bits */ - spsr |= DAIF_ABT_BIT | DAIF_IRQ_BIT | DAIF_FIQ_BIT; - spsr <<= PSR_DAIF_SHIFT; - if (ee) - spsr |= SPSR32_EE_BIT; - spsr |= mode; + daif = DAIF_ABT_BIT | DAIF_IRQ_BIT | DAIF_FIQ_BIT; + + spsr = SPSR_MODE32(mode, entrypoint & 0x1, ee, daif); /* Ensure that the CSPR.E and SCTLR.EE bits match */ psci_ns_entry_info[index].sctlr |= ee; |