diff options
| author | Sandrine Bailleux <sandrine.bailleux@arm.com> | 2014-05-20 17:22:24 +0100 |
|---|---|---|
| committer | Sandrine Bailleux <sandrine.bailleux@arm.com> | 2014-05-22 17:30:58 +0100 |
| commit | 2467f70fde43fefa38564d871e78f1f882dfe540 (patch) | |
| tree | 603dd1fc5583f51a9c83ba633ed8a1866629e627 /plat | |
| parent | dbad1bacba0a7adfd3c7c559f0fd0805087aeddd (diff) | |
TSP: Let the platform decide which secure memory to use
The TSP's linker script used to assume that the TSP would
execute from secure DRAM. Although it is currently the case
on FVPs, platforms are free to use any secure memory they wish.
This patch introduces the flexibility to load the TSP into any
secure memory. The platform code gets to specify the extents of
this memory in the platform header file, as well as the BL3-2 image
limit address. The latter definition allows to check in a generic way
that the BL3-2 image fits in its bounds.
Change-Id: I9450f2d8b32d74bd00b6ce57a0a1542716ab449c
Diffstat (limited to 'plat')
| -rw-r--r-- | plat/fvp/bl2_plat_setup.c | 4 | ||||
| -rw-r--r-- | plat/fvp/platform.h | 3 |
2 files changed, 5 insertions, 2 deletions
diff --git a/plat/fvp/bl2_plat_setup.c b/plat/fvp/bl2_plat_setup.c index ea9d0a48..672f0967 100644 --- a/plat/fvp/bl2_plat_setup.c +++ b/plat/fvp/bl2_plat_setup.c @@ -271,9 +271,9 @@ void bl2_plat_get_bl32_meminfo(meminfo_t *bl32_meminfo) bl32_meminfo->total_base = BL32_BASE; bl32_meminfo->free_base = BL32_BASE; bl32_meminfo->total_size = - (TZDRAM_BASE + TZDRAM_SIZE) - BL32_BASE; + (TSP_SEC_MEM_BASE + TSP_SEC_MEM_SIZE) - BL32_BASE; bl32_meminfo->free_size = - (TZDRAM_BASE + TZDRAM_SIZE) - BL32_BASE; + (TSP_SEC_MEM_BASE + TSP_SEC_MEM_SIZE) - BL32_BASE; bl32_meminfo->attr = BOT_LOAD; bl32_meminfo->next = 0; } diff --git a/plat/fvp/platform.h b/plat/fvp/platform.h index bd76d678..07c79d9f 100644 --- a/plat/fvp/platform.h +++ b/plat/fvp/platform.h @@ -248,7 +248,10 @@ /******************************************************************************* * BL32 specific defines. ******************************************************************************/ +#define TSP_SEC_MEM_BASE TZDRAM_BASE +#define TSP_SEC_MEM_SIZE TZDRAM_SIZE #define BL32_BASE (TZDRAM_BASE + 0x2000) +#define BL32_LIMIT (TZDRAM_BASE + (1 << 21)) /******************************************************************************* * Platform specific page table and MMU setup constants |