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authorSandrine Bailleux <sandrine.bailleux@arm.com>2013-11-18 17:26:59 +0000
committerDan Handley <dan.handley@arm.com>2013-11-27 15:31:06 +0000
commit3738274dc1b40ad846d41d7bfd6a597bcfba9e70 (patch)
tree136c4d81d7b4f285ee37f1fdf674df5332a238d4 /lib
parent204aa03da7d8a34d5e06fba3ccc9e565ed01d305 (diff)
Unmask SError and Debug exceptions.
Any asynchronous exception caused by the firmware should be handled in the firmware itself. For this reason, unmask SError exceptions (and Debug ones as well) on all boot paths. Also route external abort and SError interrupts to EL3, otherwise they will target EL1. Change-Id: I9c191d2d0dcfef85f265641c8460dfbb4d112092
Diffstat (limited to 'lib')
-rw-r--r--lib/arch/aarch64/misc_helpers.S13
1 files changed, 13 insertions, 0 deletions
diff --git a/lib/arch/aarch64/misc_helpers.S b/lib/arch/aarch64/misc_helpers.S
index 8c1f7400..05e90f95 100644
--- a/lib/arch/aarch64/misc_helpers.S
+++ b/lib/arch/aarch64/misc_helpers.S
@@ -39,6 +39,9 @@
.globl enable_serror
.globl disable_serror
+ .globl enable_debug_exceptions
+ .globl disable_debug_exceptions
+
.globl read_daif
.globl write_daif
@@ -110,6 +113,11 @@ enable_serror:; .type enable_serror, %function
ret
+enable_debug_exceptions:
+ msr daifclr, #DAIF_DBG_BIT
+ ret
+
+
disable_irq:; .type disable_irq, %function
msr daifset, #DAIF_IRQ_BIT
ret
@@ -125,6 +133,11 @@ disable_serror:; .type disable_serror, %function
ret
+disable_debug_exceptions:
+ msr daifset, #DAIF_DBG_BIT
+ ret
+
+
read_daif:; .type read_daif, %function
mrs x0, daif
ret