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| author | Andrew Thoelke <andrew.thoelke@arm.com> | 2014-05-19 12:54:05 +0100 |
|---|---|---|
| committer | Andrew Thoelke <andrew.thoelke@arm.com> | 2014-05-19 12:54:05 +0100 |
| commit | ec786cbca93651b06431e1933abb909626949644 (patch) | |
| tree | daaf0cbb0ce0fc5e8672bc8f58c8d65d5e572142 /bl31 | |
| parent | a43d431b80541ea436b71f967c5749babf978c7a (diff) | |
| parent | 2da8d8bfc0877b9c723514133554dfee4c0638f1 (diff) | |
Merge pull request #78 from jeenuv:tf-issues-148
Diffstat (limited to 'bl31')
| -rw-r--r-- | bl31/aarch64/context.S | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/bl31/aarch64/context.S b/bl31/aarch64/context.S index 45d4a225..d0bca64f 100644 --- a/bl31/aarch64/context.S +++ b/bl31/aarch64/context.S @@ -172,6 +172,8 @@ func el1_sysregs_context_save mrs x9, vbar_el1 stp x17, x9, [x0, #CTX_CONTEXTIDR_EL1] + /* Save NS timer registers if the build has instructed so */ +#if NS_TIMER_SWITCH mrs x10, cntp_ctl_el0 mrs x11, cntp_cval_el0 stp x10, x11, [x0, #CTX_CNTP_CTL_EL0] @@ -181,8 +183,11 @@ func el1_sysregs_context_save stp x12, x13, [x0, #CTX_CNTV_CTL_EL0] mrs x14, cntkctl_el1 + str x14, [x0, #CTX_CNTKCTL_EL1] +#endif + mrs x15, fpexc32_el2 - stp x14, x15, [x0, #CTX_CNTKCTL_EL1] + str x15, [x0, #CTX_FP_FPEXC32_EL2] ret @@ -253,6 +258,8 @@ func el1_sysregs_context_restore msr contextidr_el1, x17 msr vbar_el1, x9 + /* Restore NS timer registers if the build has instructed so */ +#if NS_TIMER_SWITCH ldp x10, x11, [x0, #CTX_CNTP_CTL_EL0] msr cntp_ctl_el0, x10 msr cntp_cval_el0, x11 @@ -261,8 +268,11 @@ func el1_sysregs_context_restore msr cntv_ctl_el0, x12 msr cntv_cval_el0, x13 - ldp x14, x15, [x0, #CTX_CNTKCTL_EL1] + ldr x14, [x0, #CTX_CNTKCTL_EL1] msr cntkctl_el1, x14 +#endif + + ldr x15, [x0, #CTX_FP_FPEXC32_EL2] msr fpexc32_el2, x15 /* No explict ISB required here as ERET covers it */ |