aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2023-06-07phy: rockchip-inno-usb2: Implement clock operations for usb2phy clockXavier Drudis Ferran
This clock doesn't seem needed but appears in a phandle list used by ehci-generic.c to bulk enable it. The phandle list comes from linux, where it is needed for suspend/resume to work [1]. My tests give the same results with or without this patch, but Marek Vasut found it weird to declare an empty clk_ops [2]. So I adapted the code from linux 6.1-rc8 so that it hopefully works if it ever has some user. For now, without real use, it seems to at least not give any errors when called. Link: [1] https://lkml.kernel.org/lkml/1731551.Q6cHK6n5ZM@phil/T/ [2] https://patchwork.ozlabs.org/project/uboot/patch/Y5IWpjYLB4aXMy9o@localhost/ Cc: Simon Glass <sjg@chromium.org> Cc: Philipp Tomsich <philipp.tomsich@vrull.eu> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Lukasz Majewski <lukma@denx.de> Cc: Sean Anderson <seanga2@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Christoph Fritz <chf.fritz@googlemail.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Xavier Drudis Ferran <xdrudis@tinet.cat> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # rk3399, rk3328, rv1126
2023-06-07phy: rockchip-inno-usb2: Add usb2phy clock provider of 480MHz clockXavier Drudis Ferran
arch/arm/dts/rk3399.dtsi has a node usb_host0_ehci: usb@fe380000 { compatible = "generic-ehci"; with clocks: clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>, <&u2phy0>; The first 2 refer to nodes with class UCLASS_CLK, but &u2phy0 has class UCLASS_PHY. u2phy0: usb2phy@e450 { compatible = "rockchip,rk3399-usb2phy"; Since clk_get_bulk() only looks for devices with UCLASS_CLK, it fails with -ENODEV and then ehci_usb_probe() aborts. The consequence is peripherals connected to a USB 2 port (e.g. in a Rock Pi 4 the white port, nearer the edge) not being detected. They're detected if CONFIG_USB_OHCI_GENERIC is selected in Kconfig, because ohci_usb_probe() does not abort when one clk_get_by_index() fails, but then they work in USB 1 mode. rk3399.dtsi comes from linux and the u2phy0 was added[1] to the clock list in: commit b5d1c57299734f5b54035ef2e61706b83041f20c Author: William wu <wulf@rock-chips.com> Date: Wed Dec 21 18:41:05 2016 +0800 arm64: dts: rockchip: add u2phy clock for ehci and ohci of rk3399 We found that the suspend process was blocked when it run into ehci/ohci module due to clk-480m of usb2-phy was disabled. [...] Suspend concerns don't apply to U-Boot, and the problem with U-Boot failing to probe EHCI doesn't apply to linux, because in linux rockchip_usb2phy_clk480m_register makes u2phy0 a proper clock provider when called by rockchip_usb2phy_probe(). So I can think of a few alternative solutions: 1- Change ehci_usb_probe() to make it more similar to ohci_usb_probe(), and survive failure to get one clock. Looks a little harder, and I don't know whether it could break something if it ignored a clock that was important for something else than suspend. 2- Change rk3399.dtsi effectively reverting the linux commit b5d1c57299734f5b54035ef2e61706b83041f20c. This dealigns the .dtsi from linux and seems fragile at the next synchronisation. 3- Change the clock list in rk3399-u-boot.dtsi or somewhere else. This survives .dts* sync but may survive "too much" and miss some change from linux that we might want. 4- Enable CONFIG_USB_OHCI_GENERIC and use the ports in USB 1 mode. This would need to be made for all boards using rk3399. In a simple test reading one file from USB storage it gave 769.5 KiB/s instead of 20.5 MiB/s with solution 2. 5- Trying to replicate linux and have usb2phy somehow provide a clk, or have a separate clock device for usb2phy in addition to the phy device. This patch tries to implement option 5 as Marek Vasut requested in December 5th. Options 1 and 3 didn't get through [2][3]. It just registers usb2phy as a clock driver (device_bind_driver() didn't work but device_bind_driver_to_node() did), without any specific operations, so that ehci-generic.c finds it and is happy. It worked in my tests on a Rock Pi 4 B+ (rk3399). Link: [1] https://lkml.kernel.org/lkml/1731551.Q6cHK6n5ZM@phil/T/ [2] https://patchwork.ozlabs.org/project/uboot/patch/20220701185959.GC1700@begut/ [3] https://patchwork.ozlabs.org/project/uboot/patch/Y44+ayJfUlI08ptM@localhost/ Cc: Simon Glass <sjg@chromium.org> Cc: Philipp Tomsich <philipp.tomsich@vrull.eu> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Lukasz Majewski <lukma@denx.de> Cc: Sean Anderson <seanga2@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Christoph Fritz <chf.fritz@googlemail.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Xavier Drudis Ferran <xdrudis@tinet.cat> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # rk3399, rk3328, rv1126
2023-06-07usb: musb-new: sunxi: fix error checkSam Edwards
The `musb_register` function returns some ERR_PTR(...) on failure, not NULL, so update the check here appropriately. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de>
2023-06-07Merge tag 'u-boot-amlogic-20230607' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-amlogic - meson_uart empty logic fix
2023-06-07serial: meson: fix meson_serial_pending() tx logicMattijs Korpershoek
According to the dm_serial_ops documentation, pending() should: > @return number of waiting characters, 0 for none, -ve on error And: > It is acceptable to return 1 if an indeterminant number > of characters is waiting. With the current implementation, we have: * FIFO is full -> pending() returns 0 * FIFO is partially used -> pending() returns 1 * FIFO is empty -> pending() returns 1 This is not the same as what the documentation requires. Moreover, since [1], arm reset now flushes all console devices (including serial) before the cpu gets reset. Because of the flawed logic: => reset # user calls reset flush() is called _serial_flush() is called ops->pending(dev, false) # never returns false # board hangs indefinitely without resetting. Fix it by using AML_UART_TX_EMPTY instead of AML_UART_TX_FULL. [1] commit c5f4cdb8eb60 ("console: Use flush() before panic and reset"), Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230606-fix-meson-serial-pending-v1-1-6a54d4a01f76@baylibre.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-06Merge tag 'ubifixes-for-v2023-07-rc4' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-ubi ubifs changes for v2023.07-rc4 UBIFS fixes from Ben Dooks - ubifs: allow loading to above 4GiB
2023-06-06Merge tag 'for-v2023-07-rc4' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-i2c i2c updates for v2023-07-rc4 Bugfixes: - rockchip: De-initialize the bus after start bit failure from Ondrej Jirman - cdns: Fix broken retry mechanism on arbitration lost
2023-06-06ubifs: allow loading to above 4GiBBen Dooks
The ubifsload command is truncating any address above 4GiB as it casts this address to an u32, instead of using an unsigned long which most of the other load commands do. Change this to an unsigned long to allow loading into high memory for boards which use these areas. Fixes the following error: => ubifsload 0x2100000000 /boot/Image.lzma Loading file '/boot/Image.lzma' to addr 0x00000000... Unhandled exception: Store/AMO access fault Signed-off-by: Ben Dooks <ben.dooks@sifive.com> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
2023-06-05I2C: cdns: Fix broken retry mechanism on arbitration lost.Andrea Merello
In the current implementation, in case of I2C arbitration lost, a retry is attempted; the message counter and pointer are reset to the original values and the I2C xfer process is restart from the beginning. However the message counter and message pointer are respectively decremented and incremented by one before attempting any transfer, causing the 1st transfer not to be actually retried (in case of a single transfer, nothing is actually retried at all). This patch fixes this: in case of retry, the 1st transfer is also retried. Tested on a ZynqMP Kria board, with upstream older u-boot, but the involved file and underlying logic seem basically the same. Signed-off-by: Andrea Merello <andrea.merello@iit.it>
2023-06-05i2c: rockchip: De-initialize the bus after start bit failureOndrej Jirman
Failure can happen when i2c is used without initializing pinctrl properly, which U-Boot happily allows in SPL. Without this fix, further I2C access would fail, even after proper pinctrl initialization. Signed-off-by: Ondrej Jirman <megi@xff.cz> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2023-06-02Merge tag 'efi-2023-07-rc4' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request efi-2023-07-rc4 Documentation: * man pages for loadb, loadx UEFI: * check return value of part_get_info() * improve unit test for RegisterProtocolNotify()
2023-06-02efi_selftest: LocateHandleBuffer return codeHeinrich Schuchardt
Check that LocateHandleBuffer() return EFI_NOT_FOUND when called with ByRegisterNotify and all handles already have been retrieved. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-06-02efi_loader: check return value of part_get_info()Heinrich Schuchardt
part_get_info() may return an error code. Check it. Update function description of dp_part_node(). Addresses-Coverity-ID: 184067 ("Unchecked return value") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-06-02doc: android: Fix a typoBin Meng
%s/than/then Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-06-02doc: fix loady man-pageHeinrich Schuchardt
* loady may return $? = 1. * Move misplaced description Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-06-02doc: loadx man-pageHeinrich Schuchardt
Provide a man-page for the loadx command. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-06-02doc: loadb man-pageHeinrich Schuchardt
Provide a man-page for the loadb command. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-05-30Merge branch '2023-05-30-TI-fixes-Apple-M2-support'Tom Rini
- Fixes for some TI K3 platforms and merge the Apple M2 support I had intended to pick up earlier.
2023-05-30pci: apple: Add support for M2 Pro/MaxMark Kettenis
The PCIe controller on the M2 Pro/Max is different from the one found on earlier Apple SoCs. Some registers moved and te meaning of the bits in some other registers changed. But they are still similar enough to handle both controllers in the same driver. Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2023-05-30arm: apple: Add initial Apple M2 Pro/Max supportMark Kettenis
Apple's M2 Pro/Max SoC are somewhat similar to the M1 Pro/Max but need a tweaked memory map. USB, NVMe, UART and WDT are working with the existing drivers. Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2023-05-30arm: mach-k3: security: separate out validating binary logicManorit Chawdhry
K3 GP devices allows booting the secure binaries on them by bypassing the x509 header on them. ATF and OPTEE firewalling required the rproc_load to be called before authentication. This change caused the failure for GP devices that strips off the headers. The boot vector had been set before the headers were stripped off causing the runtime stripping to fail and stripping becoming in-effective. Separate out the secure binary check on GP/HS devices so that the boot_vector could be stripped before calling rproc_load. This allows keeping the authentication later when the cluster is on along with allowing the stripping of the binaries in case of gp devices. Fixes: 1e00e9be62e5 ("arm: mach-k3: common: re-locate authentication for atf/optee") Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-05-30arm: mach-k3: Increase SYSFW max image sizeDave Gerlach
When booting with HS silicon, the system firmware image is 278270, which is slightly larger than currently allocated amount. This can cause unexpected behavior if this overlap interferes with other things in memory, so increase this with a slightly margin added as well to avoid any boot issues that can appear after system firmware gets loaded. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tero Kristo <kristo@kernel.org> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Reviewed-by: Dhruva Gole <d-gole@ti.com>
2023-05-30Kconfig: j721e: Change K3_MCU_SCRATCHPAD_BASE to non firewalled regionManorit Chawdhry
In non-combined boot flow for K3, all the firewalls are locked by default until sysfw comes up. Rom configures some of the firewall for its usage along with the SRAM for R5 but the PSRAM region is still locked. The K3 MCU Scratchpad for j721e was set to a PSRAM region triggering the firewall exception before sysfw came up. The exception started happening after adding multi dtb support that accesses the scratchpad for reading EEPROM contents. The commit changes R5 MCU scratchpad for j721e to an SRAM region. Old Map: ┌─────────────────────────────────────┐ 0x41c00000 │ SPL │ ├─────────────────────────────────────┤ 0x41c40000 (approx) │ STACK │ ├─────────────────────────────────────┤ 0x41c85b20 │ Global data │ │ sizeof(struct global_data) = 0xd8 │ ├─────────────────────────────────────┤ gd->malloc_base = 0x41c85bfc │ HEAP │ │ CONFIG_SYS_MALLOC_F_LEN = 0x70000 │ ├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR │ SPL BSS │ (0x41cf5bfc) │ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │ └─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX                 (0x41cffbfc) New Map: ┌─────────────────────────────────────┐ 0x41c00000 │ SPL │ ├─────────────────────────────────────┤ 0x41c40000 (approx) │ EMPTY │ ├─────────────────────────────────────┤ 0x41c81920 │ STACK │ │ SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000 │ ├─────────────────────────────────────┤ 0x41c85920 │ Global data │ │ sizeof(struct global_data) = 0xd8 │ ├─────────────────────────────────────┤ gd->malloc_base = 0x41c859f0 │ HEAP │ │ CONFIG_SYS_MALLOC_F_LEN = 0x70000 │ ├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR │ SPL BSS │ (0x41cf59f0) │ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │ ├─────────────────────────────────────┤ 0x41cff9fc │ NEW MCU SCRATCHPAD │ │ SYS_K3_MCU_SCRATCHPAD_SIZE = 0x200 │ └─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX                 (0x41cffbfc) Fixes: ab977c8b91b4 ("configs: j721s2_evm_r5: Enable support for building multiple dtbs into FIT") Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> [n-francis@ti.com: SRAM allocation addressing diagram] Signed-off-by: Neha Francis <n-francis@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
2023-05-30configs: j721e: Merge the HS and non-HS defconfigsManorit Chawdhry
K3 devices have runtime type board detection. Make the default defconfig include the secure configuration. Then remove the HS specific config. Non-HS devices will continue to boot due to runtime device type detection. If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS devices these can be ignored. Reviewed-by: Bryan Brattlof <bb@ti.com> Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Acked-by: Andrew Davis <afd@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-05-30arm: k3: config.mk: Add missing dependencies on tispl.bin HSAndrew Davis
When building for secure devices using non-buildman based image generation the signed tispl.bin file is called tispl.bin_HS. Also build the unsigned tispl.bin file as expected. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-05-29Prepare v2023.07-rc3Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-29configs: Resync with savedefconfigTom Rini
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-25Merge tag 'u-boot-imx-20230525' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20230525 ------------------- - i.MX93 series - Fixes CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/16412
2023-05-21serial: mxs: Add MXS AUART driverMarek Vasut
Add trivial driver for the MXS AUART IP. This is the other UART IP present in i.MX23 and i.MX28, used to drive the non-DUART ports. Signed-off-by: Marek Vasut <marex@denx.de>
2023-05-21imx9: imx93_evk: enable sysresetPeng Fan
Enable sysreset for i.MX93 EVK. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: imx93_evk: update ddr timing filePeng Fan
Update DDR timing file generated by DDR Config Tool 1. Dynamic refresh rate is set by default 2. The 3rd freq will be 625MTS based on power and performance better than 100MTS. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: Calculate DDR size from DDRC settingYe Li
To avoid using static setting for ECC enabled DDR size, switch to calculate DDR size from DDRC setting Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21ddr: imx9: update the rank setting for multi fsp supportJacky Bai
The rank setting flow should be updated to support multi fsp config. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21ddr: imx93: update the ddr init to support mult setpointsJacky Bai
Update the DDR init flow for multi-setpoint support on i.MX93. A new fsp_cfg struct need to be added in the timing file to store the diff part of the DDRC and DRAM MR register for each setpoint. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21ddr: imx93: Add 625M bypass clock supportJacky Bai
Add 625M bypass clock that may be used DRAM 625M bypass mode support. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21ddr: imx9: Change the saved ddr data base to 0x2051c000Jacky Bai
change the ddr saved info to the last 16KB of the OCRAM. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: imx93_evk: Update spl stack & bss base addressPeng Fan
As the ddr timing info will be saved at the last 16KB of the OCRAM, spl stack & bss base should be updated to avoid conflict. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21ddr: imx9: Add workaround for DDRPHY rank-to-rank errataYe Li
According to DDRPHY errata, the Rank-to-Rank Spacing and tphy_rdcsgap specification does not include the Critical Delay Difference (CDD) to properly define the required rank-to-rank read command spacing after executing PHY training firmware. Following the errata workaround, at the end of data training, we get all CDD values through the MessageBlock, then re-configure the DDRC timing of WWT/WRT/RRT/RWT with comparing MAX CDD values. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2023-05-21arm: dts: imx93: add tmuPeng Fan
Add tmu nodes and thermal zone Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21arm: dts: imx93: sync device tree with LinuxPeng Fan
Sync device tree with next-20230426 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: allow to bootaux Mcore with input addressYe Li
Currently bootaux only supports to boot M33 core from TCM. Since ATF has changed to use x2 parameter for M33 image address, update the bootaux command to use input address, so we can support boot from any possilbe address like TCM, DDR, Flexspi NOR. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: imx93_evk: add low drive mode support on 11x11 EVKPeng Fan
Add a static u-boot config for i.MX93 low drive mode support. When low drive mode is enabled, VDD_SOC is set to 0.75V. Bus clocks, A55 core clock (900Mhz), DDR clock (1866MTS), and some peripherals clocks (USDHC/FLEXSPI/PDM/DISP_PIX/CAM_PIX) must decrease to meet max frequencies in low drive mode. Also set standby voltage for buck1 Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: use i.MX generic rom api functionPeng Fan
There is no need to save gd with using the generic rom api function, so simplify code. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: correct coding stylePeng Fan
The end brace should be in a new line Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: add i.MX93 variants supportPeng Fan
According to datasheet, iMX93 has fused parts with CORE1 or NPU or both disabled. So update code to support it, the kernel device tree runtime update will be added in future patches. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: clock: config arm alt root to 500mhzPeng Fan
Config the A55 alt root clock to 500MHz(LD mode frequency) by default. Normally, this clock root is only used as an intermediate clock soure for A55 core/dsu when change the ARM PLL frequency. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: clock: add CONFIG_IMX9_LOW_DRIVE_MODE supportPeng Fan
Add CONFIG_IMX9_LOW_DRIVE_MODE in imx9 clk, later we will add board support Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: clock: clear HW_CTRL_SELPeng Fan
The HW_CTRL_SEL should be cleared when configuring PLL to avoid potential glitch Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: Get market segment and speed gradingPeng Fan
Get the chip's market segment and speed grading from fuse and print them in boot log as other i.MX series. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: soc: support reset causePeng Fan
Support print reset cause. Since SRSR is not accessible from non-secure world, so first save it to grp0, then read it in non-secure world. Signed-off-by: Peng Fan <peng.fan@nxp.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-11 06:40:50 +0000