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authorMichael Brown <mbrown@fensystems.co.uk>2019-07-17 12:46:43 +0100
committerLeif Lindholm <leif.lindholm@linaro.org>2019-07-19 17:31:51 +0100
commit2b728814e510fa9c9bcd5054bd9fd0db08fcb14e (patch)
treec1e58841fec1012d72b45af2dd3b80824d847d34 /Platform/RaspberryPi/RPi3/Drivers/DwUsbHostDxe/DwUsbHostDxe.c
parent3542dfdecab11e55997c93b09edd59eb90f422ef (diff)
Platform/RPi3: Use Wait4Bit return value consistently
There are multiple points in the existing code that take the UINT32 value returned by Wait4Bit and return it directly as an EFI_STATUS value. If Wait4Bit fails, this will result in a spurious EFI_STATUS value of 0x1 (EFI_WARN_UNKNOWN_GLYPH) being returned to the caller. A caller treating any non-zero value as an error will see this as a failure, but a caller using the EFI_ERROR macro will incorrectly see it as a success. Fix by defining the return type of Wait4Bit as EFI_STATUS and ensuring that a valid EFI_STATUS value is always returned. Signed-off-by: Pete Batard <pete@akeo.ie> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'Platform/RaspberryPi/RPi3/Drivers/DwUsbHostDxe/DwUsbHostDxe.c')
-rw-r--r--Platform/RaspberryPi/RPi3/Drivers/DwUsbHostDxe/DwUsbHostDxe.c19
1 files changed, 10 insertions, 9 deletions
diff --git a/Platform/RaspberryPi/RPi3/Drivers/DwUsbHostDxe/DwUsbHostDxe.c b/Platform/RaspberryPi/RPi3/Drivers/DwUsbHostDxe/DwUsbHostDxe.c
index 59120b9d..c1e1229f 100644
--- a/Platform/RaspberryPi/RPi3/Drivers/DwUsbHostDxe/DwUsbHostDxe.c
+++ b/Platform/RaspberryPi/RPi3/Drivers/DwUsbHostDxe/DwUsbHostDxe.c
@@ -53,7 +53,7 @@ DwCoreInit (
IN EFI_EVENT Timeout
);
-UINT32
+EFI_STATUS
Wait4Bit (
IN EFI_EVENT Timeout,
IN UINT32 Reg,
@@ -70,14 +70,14 @@ Wait4Bit (
}
if ((Value & Mask) == Mask) {
- return 0;
+ return EFI_SUCCESS;
}
} while (EFI_ERROR (gBS->CheckEvent (Timeout)));
DEBUG ((DEBUG_ERROR, "Wait4Bit: %a timeout (reg:0x%x, value:0x%x, mask:0x%x)\n",
Set ? "set" : "clear", Reg, Set ? Value : ~Value, Mask));
- return 1;
+ return EFI_TIMEOUT;
}
CHANNEL_HALT_REASON
@@ -91,13 +91,14 @@ Wait4Chhltd (
IN SPLIT_CONTROL *Split
)
{
- INT32 Ret;
+ EFI_STATUS Status;
UINT32 Hcint, Hctsiz;
UINT32 HcintCompHltAck = DWC2_HCINT_XFERCOMP;
MicroSecondDelay (100);
- Ret = Wait4Bit (Timeout, DwHc->DwUsbBase + HCINT (Channel), DWC2_HCINT_CHHLTD, 1);
- if (Ret) {
+ Status = Wait4Bit (Timeout, DwHc->DwUsbBase + HCINT (Channel),
+ DWC2_HCINT_CHHLTD, 1);
+ if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Channel %u did not halt\n", Channel));
return XFER_NOT_HALTED;
}
@@ -204,7 +205,7 @@ DwCoreReset (
IN EFI_EVENT Timeout
)
{
- UINT32 Status;
+ EFI_STATUS Status;
Status = Wait4Bit (Timeout, DwHc->DwUsbBase + GRSTCTL, DWC2_GRSTCTL_AHBIDLE, 1);
if (Status) {
@@ -1261,7 +1262,7 @@ DwFlushTxFifo (
IN INT32 Num
)
{
- UINT32 Status;
+ EFI_STATUS Status;
MmioWrite32 (DwHc->DwUsbBase + GRSTCTL, DWC2_GRSTCTL_TXFFLSH |
(Num << DWC2_GRSTCTL_TXFNUM_OFFSET));
@@ -1279,7 +1280,7 @@ DwFlushRxFifo (
IN EFI_EVENT Timeout
)
{
- UINT32 Status;
+ EFI_STATUS Status;
MmioWrite32 (DwHc->DwUsbBase + GRSTCTL, DWC2_GRSTCTL_RXFFLSH);