diff options
| author | Michael D Kinney <michael.d.kinney@intel.com> | 2019-06-24 18:52:31 -0700 |
|---|---|---|
| committer | Michael D Kinney <michael.d.kinney@intel.com> | 2019-07-01 16:13:20 -0700 |
| commit | f58e8c75568e2c3ec1a0b8104c9a8b19fc34677b (patch) | |
| tree | 510407285e059203180e321d7e5749f8d9c79043 /Platform/Intel/Vlv2TbltDevicePkg | |
| parent | cf23baaeb5ec95b6e47c30189c94e168468f0256 (diff) | |
Vlv2TbltDevicePkg: Use PI Spec SMBUS2 PPI
* Switch from Intel Framework SMBUS PPI to the PI Spec
SMBUS2 PPI.
* Remove unused SmbusLib. Use SmbusLibNull instead.
Cc: Zailiang Sun <zailiang.sun@intel.com>
Cc: Yi Qian <yi.qian@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-By: Zailiang Sun <zailiang.sun@intel.com>
Diffstat (limited to 'Platform/Intel/Vlv2TbltDevicePkg')
17 files changed, 24 insertions, 1323 deletions
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Include/Guid/PlatformInfo.h b/Platform/Intel/Vlv2TbltDevicePkg/Include/Guid/PlatformInfo.h index cac31e2a..afd4b6f4 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/Include/Guid/PlatformInfo.h +++ b/Platform/Intel/Vlv2TbltDevicePkg/Include/Guid/PlatformInfo.h @@ -1,12 +1,8 @@ /*++
- Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-
-
+ Copyright (c) 2004 - 2019, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
Module Name:
@@ -27,7 +23,6 @@ Abstract: #include <Library/HobLib.h>
#include <Library/IoLib.h>
#include <Library/DebugLib.h>
-#include <Library/SmbusLib.h>
#include <IndustryStandard/SmBus.h>
#endif
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardClkGens/BoardClkGens.c b/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardClkGens/BoardClkGens.c index 919032c2..4356f7b3 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardClkGens/BoardClkGens.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardClkGens/BoardClkGens.c @@ -1,11 +1,9 @@ /** @file
Clock generator setting for multiplatform.
- Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
+ Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.<BR>
-
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -44,7 +42,7 @@ CLOCK_GENERATOR_DETAILS mSupportedClockGeneratorTable[] = EFI_STATUS
ConfigureClockGenerator (
IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_SMBUS_PPI *SmbusPpi,
+ IN EFI_PEI_SMBUS2_PPI *SmbusPpi,
IN CLOCK_GENERATOR_TYPE ClockType,
IN UINT8 ClockAddress,
IN UINTN ConfigurationTableLength,
@@ -76,7 +74,6 @@ ConfigureClockGenerator ( Length = sizeof (Buffer);
Command = 0;
Status = SmbusPpi->Execute (
- PeiServices,
SmbusPpi,
SlaveAddress,
Command,
@@ -116,7 +113,6 @@ ConfigureClockGenerator ( Buffer[30] = 0x00;
Status = SmbusPpi->Execute (
- PeiServices,
SmbusPpi,
SlaveAddress,
Command,
@@ -127,7 +123,6 @@ ConfigureClockGenerator ( );
#else
Status = SmbusPpi->Execute (
- PeiServices,
SmbusPpi,
SlaveAddress,
Command,
@@ -142,7 +137,6 @@ ConfigureClockGenerator ( Command = 4;
Length = 1;
Status = SmbusPpi->Execute (
- PeiServices,
SmbusPpi,
SlaveAddress,
Command,
@@ -164,7 +158,6 @@ ConfigureClockGenerator ( Length = sizeof (Buffer);
Command = 0;
Status = SmbusPpi->Execute (
- PeiServices,
SmbusPpi,
SlaveAddress,
Command,
@@ -201,7 +194,7 @@ ConfigureClockGenerator ( UINT8
ReadClockGeneratorID (
IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_SMBUS_PPI *SmbusPpi,
+ IN EFI_PEI_SMBUS2_PPI *SmbusPpi,
IN UINT8 ClockAddress
)
{
@@ -217,7 +210,6 @@ ReadClockGeneratorID ( Length = sizeof (Buffer);
Command = 0;
SmbusPpi->Execute (
- PeiServices,
SmbusPpi,
SlaveAddress,
Command,
@@ -289,7 +281,7 @@ ConfigurePlatformClocks ( //
Status = (**PeiServices).LocatePpi (
(CONST EFI_PEI_SERVICES **) PeiServices,
- &gEfiPeiSmbusPpiGuid,
+ &gEfiPeiSmbus2PpiGuid,
0,
NULL,
&SmbusPpi
@@ -300,8 +292,7 @@ ConfigurePlatformClocks ( SlaveAddress.SmbusDeviceAddress = ClockAddress >> 1;
Length = 1;
Command = 0x87; //Control Register 7 Vendor ID Check
- Status = ((EFI_PEI_SMBUS_PPI *) SmbusPpi)->Execute (
- PeiServices,
+ Status = ((EFI_PEI_SMBUS2_PPI *) SmbusPpi)->Execute (
SmbusPpi,
SlaveAddress,
Command,
@@ -405,7 +396,7 @@ ConfigurePlatformClocks ( static EFI_PEI_NOTIFY_DESCRIPTOR mNotifyList[] = {
{
EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK| EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
- &gEfiPeiSmbusPpiGuid,
+ &gEfiPeiSmbus2PpiGuid,
ConfigurePlatformClocks
}
};
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardClkGens/BoardClkGens.h b/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardClkGens/BoardClkGens.h index e153933d..fe0ed24a 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardClkGens/BoardClkGens.h +++ b/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardClkGens/BoardClkGens.h @@ -3,11 +3,10 @@ This file includes package header files, library classes.
- Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>
-
+ Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.<BR>
+
SPDX-License-Identifier: BSD-2-Clause-Patent
-
**/
#ifndef _BOARD_CLK_GEN_H_
@@ -17,8 +16,7 @@ #include <Library/HobLib.h>
#include <Library/IoLib.h>
#include <Library/DebugLib.h>
-#include <Library/SmbusLib.h>
-#include <Ppi/Smbus.h>
+#include <Ppi/Smbus2.h>
#include <IndustryStandard/SmBus.h>
#include <Guid/PlatformInfo.h>
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardGpios/BoardGpios.c b/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardGpios/BoardGpios.c index 5790d045..a9e2c8c0 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardGpios/BoardGpios.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardGpios/BoardGpios.c @@ -1,11 +1,9 @@ /** @file
Gpio setting for multiplatform..
- Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
+ Copyright (c) 2013 - 2019, Intel Corporation. All rights reserved.<BR>
-
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -25,8 +23,6 @@ //AlpineValley platform code end
//
-EFI_GUID gPeiSmbusPpiGuid = EFI_PEI_SMBUS_PPI_GUID;
-
/**
@param None
@@ -66,7 +62,7 @@ ConfigurePlatformSysCtrlGpio ( Status = (**PeiServices).LocatePpi (
(const EFI_PEI_SERVICES **)PeiServices,
- &gPeiSmbusPpiGuid,
+ &gEfiPeiSmbus2PpiGuid,
0,
NULL,
(void **)&SmbusPpi
@@ -92,7 +88,7 @@ ConfigurePlatformSysCtrlGpio ( static EFI_PEI_NOTIFY_DESCRIPTOR mNotifyList[] = {
{
EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK| EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
- &gEfiPeiSmbusPpiGuid,
+ &gEfiPeiSmbus2PpiGuid,
ConfigurePlatformSysCtrlGpio
}
};
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardGpios/BoardGpios.h b/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardGpios/BoardGpios.h index 0e19819b..594616d6 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardGpios/BoardGpios.h +++ b/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardGpios/BoardGpios.h @@ -3,11 +3,10 @@ This file includes package header files, library classes.
- Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>
-
+ Copyright (c) 2013 - 2019, Intel Corporation. All rights reserved.<BR>
+
SPDX-License-Identifier: BSD-2-Clause-Patent
-
**/
#ifndef _BOARDGPIOS_H_
@@ -20,7 +19,7 @@ #include <Library/IoLib.h>
#include <Library/HobLib.h>
#include <Guid/PlatformInfo.h>
-#include <Ppi/Smbus.h>
+#include <Ppi/Smbus2.h>
#include <Ppi/ReadOnlyVariable2.h>
#include <Guid/SetupVariable.h>
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/MultiPlatformLib.h b/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/MultiPlatformLib.h index 3fa9f7b1..13097fbc 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/MultiPlatformLib.h +++ b/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/MultiPlatformLib.h @@ -26,7 +26,6 @@ #include <PiDxe.h>
#include <Library/BaseLib.h>
-#include <FrameworkPei.h>
#include "PlatformBaseAddresses.h"
#include "PchAccess.h"
@@ -37,7 +36,6 @@ #include <Ppi/Stall.h>
#include <Guid/SetupVariable.h>
#include <Ppi/AtaController.h>
-#include <Ppi/FindFv.h>
#include <Ppi/BootInRecoveryMode.h>
#include <Ppi/ReadOnlyVariable2.h>
#include <Ppi/Capsule.h>
@@ -50,7 +48,6 @@ #include <Library/BaseLib.h>
#include <IndustryStandard/Pci22.h>
#include <Ppi/Speaker.h>
-#include <Guid/FirmwareFileSystem.h>
#include <Guid/MemoryTypeInformation.h>
#include <Ppi/Reset.h>
#include <Ppi/EndOfPeiPhase.h>
@@ -58,7 +55,6 @@ #include <Guid/GlobalVariable.h>
#include <Ppi/RecoveryModule.h>
#include <Ppi/DeviceRecoveryModule.h>
-#include <Guid/Capsule.h>
#include <Guid/RecoveryDevice.h>
#include <Ppi/MasterBootMode.h>
#include <Guid/PlatformInfo.h>
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/MultiPlatformLib.inf b/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/MultiPlatformLib.inf index a4942a09..7a084bea 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/MultiPlatformLib.inf +++ b/Platform/Intel/Vlv2TbltDevicePkg/Library/MultiPlatformLib/MultiPlatformLib.inf @@ -54,7 +54,6 @@ MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec Vlv2TbltDevicePkg/PlatformPkg.dec - IntelFrameworkPkg/IntelFrameworkPkg.dec Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec [LibraryClasses] @@ -64,6 +63,7 @@ [Ppis] gEfiPeiReadOnlyVariable2PpiGuid + gEfiPeiSmbus2PpiGuid [Pcd.common] gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/SmbusLib/CommonHeader.h b/Platform/Intel/Vlv2TbltDevicePkg/Library/SmbusLib/CommonHeader.h deleted file mode 100644 index d34dd942..00000000 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/SmbusLib/CommonHeader.h +++ /dev/null @@ -1,26 +0,0 @@ -/**@file
- Common header file shared by all source files.
-
- This file includes package header files, library classes.
-
- Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-
-**/
-
-#ifndef __COMMON_HEADER_H_
-#define __COMMON_HEADER_H_
-
-
-#include <Base.h>
-#include <PchAccess.h>
-
-#include <Library/SmbusLib.h>
-#include <Library/IoLib.h>
-#include <Library/PciLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-
-#endif
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/SmbusLib/SmbusLib.c b/Platform/Intel/Vlv2TbltDevicePkg/Library/SmbusLib/SmbusLib.c deleted file mode 100644 index 40527248..00000000 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/SmbusLib/SmbusLib.c +++ /dev/null @@ -1,873 +0,0 @@ -/** @file
- Intel ICH9 SMBUS library implementation built upon I/O library.
-
- Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-
-
-**/
-
-#include "CommonHeader.h"
-
-/**
- Gets Io port base address of Smbus Host Controller.
-
- This internal function depends on a feature flag named PcdIchSmbusFixedIoPortBaseAddress
- to retrieve Smbus Io port base. If that feature flag is true, it will get Smbus Io port base
- address from a preset Pcd entry named PcdIchSmbusIoPortBaseAddress; otherwise, it will always
- read Pci configuration space to get that value in each Smbus bus transaction.
-
- @return The Io port base address of Smbus host controller.
-
-**/
-UINTN
-InternalGetSmbusIoPortBaseAddress (
- VOID
- )
-{
- UINTN IoPortBaseAddress;
-
- IoPortBaseAddress = (UINTN) MmioRead32 (MmPciAddress (0, DEFAULT_PCI_BUS_NUMBER_PCH, PCI_DEVICE_NUMBER_PCH_SMBUS, PCI_FUNCTION_NUMBER_PCH_SMBUS, R_PCH_SMBUS_BASE)) & B_PCH_SMBUS_BASE_BAR;
-
- //
- // Make sure that the IO port base address has been properly set.
- //
- ASSERT (IoPortBaseAddress != 0);
-
- return IoPortBaseAddress;
-}
-
-/**
- Acquires the ownership of SMBUS.
-
- This internal function reads the host state register.
- If the SMBUS is not available, RETURN_TIMEOUT is returned;
- Otherwise, it performs some basic initializations and returns
- RETURN_SUCCESS.
-
- @param IoPortBaseAddress The Io port base address of Smbus Host controller.
-
- @retval RETURN_SUCCESS The SMBUS command was executed successfully.
- @retval RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
-
-**/
-RETURN_STATUS
-InternalSmBusAcquire (
- UINTN IoPortBaseAddress
- )
-{
- UINT8 HostStatus;
-
- HostStatus = IoRead8 (IoPortBaseAddress + R_PCH_SMBUS_HSTS);
- if ((HostStatus & B_PCH_SMBUS_IUS) != 0) {
- return RETURN_TIMEOUT;
- } else if ((HostStatus & B_PCH_SMBUS_HBSY) != 0) {
- //
- // Clear host status register and exit.
- //
- IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HSTS, B_PCH_SMBUS_HSTS_ALL);
- return RETURN_TIMEOUT;
- }
- //
- // Clear out any odd status information (Will Not Clear In Use).
- //
- IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HSTS, HostStatus);
-
- return RETURN_SUCCESS;
-}
-
-/**
- Starts the SMBUS transaction and waits until the end.
-
- This internal function start the SMBUS transaction and waits until the transaction
- of SMBUS is over by polling the INTR bit of Host status register.
- If the SMBUS is not available, RETURN_TIMEOUT is returned;
- Otherwise, it performs some basic initializations and returns
- RETURN_SUCCESS.
-
- @param IoPortBaseAddress The Io port base address of Smbus Host controller.
- @param HostControl The Host control command to start SMBUS transaction.
-
- @retval RETURN_SUCCESS The SMBUS command was executed successfully.
- @retval RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect).
- @retval RETURN_DEVICE_ERROR The request was not completed because a failure reflected
- in the Host Status Register bit. Device errors are
- a result of a transaction collision, illegal command field,
- unclaimed cycle (host initiated), or bus errors (collisions).
-
-**/
-RETURN_STATUS
-InternalSmBusStart (
- IN UINTN IoPortBaseAddress,
- IN UINT8 HostControl
- )
-{
- UINT8 HostStatus;
- UINT8 AuxiliaryStatus;
-
- //
- // Set Host Control Register (Initiate Operation, Interrupt disabled).
- //
- IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HCTL, (UINT8)(HostControl + B_PCH_SMBUS_START));
-
- do {
- //
- // Poll INTR bit of Host Status Register.
- //
- HostStatus = IoRead8 (IoPortBaseAddress + R_PCH_SMBUS_HSTS);
- } while ((HostStatus & (B_PCH_SMBUS_INTR | B_PCH_SMBUS_ERRORS | B_PCH_SMBUS_BYTE_DONE_STS)) == 0);
-
- if ((HostStatus & B_PCH_SMBUS_ERRORS) == 0) {
- return RETURN_SUCCESS;
- }
-
- //
- // Clear error bits of Host Status Register.
- //
- IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HSTS, B_PCH_SMBUS_ERRORS);
-
- //
- // Read Auxiliary Status Register to judge CRC error.
- //
- AuxiliaryStatus = IoRead8 (IoPortBaseAddress + R_PCH_SMBUS_AUXS);
- if ((AuxiliaryStatus & B_PCH_SMBUS_CRCE) != 0) {
- return RETURN_CRC_ERROR;
- }
-
- return RETURN_DEVICE_ERROR;
-}
-
-/**
- Executes an SMBUS quick, byte or word command.
-
- This internal function executes an SMBUS quick, byte or word commond.
- If Status is not NULL, then the status of the executed command is returned in Status.
-
- @param HostControl The value of Host Control Register to set.
- @param SmBusAddress Address that encodes the SMBUS Slave Address,
- SMBUS Command, SMBUS Data Length, and PEC.
- @param Value The byte/word write to the SMBUS.
- @param Status Return status for the executed command.
- This is an optional parameter and may be NULL.
-
- @return The byte/word read from the SMBUS.
-
-**/
-UINT16
-InternalSmBusNonBlock (
- IN UINT8 HostControl,
- IN UINTN SmBusAddress,
- IN UINT16 Value,
- OUT RETURN_STATUS *Status
- )
-{
- RETURN_STATUS ReturnStatus;
- UINTN IoPortBaseAddress;
- UINT8 AuxiliaryControl;
-
- IoPortBaseAddress = InternalGetSmbusIoPortBaseAddress ();
-
- //
- // Try to acquire the ownership of ICH SMBUS.
- //
- ReturnStatus = InternalSmBusAcquire (IoPortBaseAddress);
- if (RETURN_ERROR (ReturnStatus)) {
- goto Done;
- }
-
- //
- // Set the appropriate Host Control Register and auxiliary Control Register.
- //
- AuxiliaryControl = 0;
- if (SMBUS_LIB_PEC (SmBusAddress)) {
- AuxiliaryControl |= B_PCH_SMBUS_AAC;
- HostControl |= B_PCH_SMBUS_PEC_EN;
- }
-
- //
- // Set Host Command Register.
- //
- IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HCMD, (UINT8) SMBUS_LIB_COMMAND (SmBusAddress));
-
- //
- // Write value to Host Data 0 and Host Data 1 Registers.
- //
- IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HD0, (UINT8) Value);
- IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HD1, (UINT8) (Value >> 8));
-
- //
- // Set Auxiliary Control Register.
- //
- IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_AUXC, AuxiliaryControl);
-
- //
- // Set SMBUS slave address for the device to send/receive from.
- //
- IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_TSA, (UINT8) SmBusAddress);
-
- //
- // Start the SMBUS transaction and wait for the end.
- //
- ReturnStatus = InternalSmBusStart (IoPortBaseAddress, HostControl);
-
- //
- // Read value from Host Data 0 and Host Data 1 Registers.
- //
- Value = (UINT16)(IoRead8 (IoPortBaseAddress + R_PCH_SMBUS_HD1) << 8);
- Value = (UINT16)(Value | IoRead8 (IoPortBaseAddress + R_PCH_SMBUS_HD0));
-
- //
- // Clear Host Status Register and Auxiliary Status Register.
- //
- IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HSTS, B_PCH_SMBUS_HSTS_ALL);
- IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_AUXS, B_PCH_SMBUS_CRCE);
-
-Done:
- if (Status != NULL) {
- *Status = ReturnStatus;
- }
-
- return Value;
-}
-
-/**
- Executes an SMBUS quick read command.
-
- Executes an SMBUS quick read command on the SMBUS device specified by SmBusAddress.
- Only the SMBUS slave address field of SmBusAddress is required.
- If Status is not NULL, then the status of the executed command is returned in Status.
- If PEC is set in SmBusAddress, then ASSERT().
- If Command in SmBusAddress is not zero, then ASSERT().
- If Length in SmBusAddress is not zero, then ASSERT().
- If any reserved bits of SmBusAddress are set, then ASSERT().
-
- @param SmBusAddress Address that encodes the SMBUS Slave Address,
- SMBUS Command, SMBUS Data Length, and PEC.
- @param Status Return status for the executed command.
- This is an optional parameter and may be NULL.
-
-**/
-VOID
-EFIAPI
-SmBusQuickRead (
- IN UINTN SmBusAddress,
- OUT RETURN_STATUS *Status OPTIONAL
- )
-{
- ASSERT (!SMBUS_LIB_PEC (SmBusAddress));
- ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
- ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);
-
- InternalSmBusNonBlock (
- V_PCH_SMBUS_SMB_CMD_QUICK,
- SmBusAddress | B_PCH_SMBUS_RW_SEL_READ,
- 0,
- Status
- );
-}
-
-/**
- Executes an SMBUS quick write command.
-
- Executes an SMBUS quick write command on the SMBUS device specified by SmBusAddress.
- Only the SMBUS slave address field of SmBusAddress is required.
- If Status is not NULL, then the status of the executed command is returned in Status.
- If PEC is set in SmBusAddress, then ASSERT().
- If Command in SmBusAddress is not zero, then ASSERT().
- If Length in SmBusAddress is not zero, then ASSERT().
- If any reserved bits of SmBusAddress are set, then ASSERT().
-
- @param SmBusAddress Address that encodes the SMBUS Slave Address,
- SMBUS Command, SMBUS Data Length, and PEC.
- @param Status Return status for the executed command.
- This is an optional parameter and may be NULL.
-
-**/
-VOID
-EFIAPI
-SmBusQuickWrite (
- IN UINTN SmBusAddress,
- OUT RETURN_STATUS *Status OPTIONAL
- )
-{
- ASSERT (!SMBUS_LIB_PEC (SmBusAddress));
- ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
- ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);
-
- InternalSmBusNonBlock (
- V_PCH_SMBUS_SMB_CMD_QUICK,
- SmBusAddress | B_PCH_SMBUS_RW_SEL_WRITE,
- 0,
- Status
- );
-}
-
-/**
- Executes an SMBUS receive byte command.
-
- Executes an SMBUS receive byte command on the SMBUS device specified by SmBusAddress.
- Only the SMBUS slave address field of SmBusAddress is required.
- The byte received from the SMBUS is returned.
- If Status is not NULL, then the status of the executed command is returned in Status.
- If Command in SmBusAddress is not zero, then ASSERT().
- If Length in SmBusAddress is not zero, then ASSERT().
- If any reserved bits of SmBusAddress are set, then ASSERT().
-
- @param SmBusAddress Address that encodes the SMBUS Slave Address,
- SMBUS Command, SMBUS Data Length, and PEC.
- @param Status Return status for the executed command.
- This is an optional parameter and may be NULL.
-
- @return The byte received from the SMBUS.
-
-**/
-UINT8
-EFIAPI
-SmBusReceiveByte (
- IN UINTN SmBusAddress,
- OUT RETURN_STATUS *Status OPTIONAL
- )
-{
- UINT8 ValueReturn = 0;
-
- ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
- ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);
-
- ValueReturn = (UINT8) InternalSmBusNonBlock (
- V_PCH_SMBUS_SMB_CMD_BYTE,
- SmBusAddress | B_PCH_SMBUS_RW_SEL_READ,
- 0,
- Status
- );
- return ValueReturn;
-
- }
-
-/**
- Executes an SMBUS send byte command.
-
- Executes an SMBUS send byte command on the SMBUS device specified by SmBusAddress.
- The byte specified by Value is sent.
- Only the SMBUS slave address field of SmBusAddress is required. Value is returned.
- If Status is not NULL, then the status of the executed command is returned in Status.
- If Command in SmBusAddress is not zero, then ASSERT().
- If Length in SmBusAddress is not zero, then ASSERT().
- If any reserved bits of SmBusAddress are set, then ASSERT().
-
- @param SmBusAddress Address that encodes the SMBUS Slave Address,
- SMBUS Command, SMBUS Data Length, and PEC.
- @param Value The 8-bit value to send.
- @param Status Return status for the executed command.
- This is an optional parameter and may be NULL.
-
- @return The parameter of Value.
-
-**/
-UINT8
-EFIAPI
-SmBusSendByte (
- IN UINTN SmBusAddress,
- IN UINT8 Value,
- OUT RETURN_STATUS *Status OPTIONAL
- )
-{
- UINT8 ValueReturn = 0;
-
- ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
- ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);
-
- ValueReturn = (UINT8) InternalSmBusNonBlock (
- V_PCH_SMBUS_SMB_CMD_BYTE,
- SmBusAddress | B_PCH_SMBUS_RW_SEL_WRITE,
- Value,
- Status
- );
- return ValueReturn;
-
- }
-
-/**
- Executes an SMBUS read data byte command.
-
- Executes an SMBUS read data byte command on the SMBUS device specified by SmBusAddress.
- Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
- The 8-bit value read from the SMBUS is returned.
- If Status is not NULL, then the status of the executed command is returned in Status.
- If Length in SmBusAddress is not zero, then ASSERT().
- If any reserved bits of SmBusAddress are set, then ASSERT().
-
- @param SmBusAddress Address that encodes the SMBUS Slave Address,
- SMBUS Command, SMBUS Data Length, and PEC.
- @param Status Return status for the executed command.
- This is an optional parameter and may be NULL.
-
- @return The byte read from the SMBUS.
-
-**/
-UINT8
-EFIAPI
-SmBusReadDataByte (
- IN UINTN SmBusAddress,
- OUT RETURN_STATUS *Status OPTIONAL
- )
-{
- UINT8 ValueReturn = 0;
-
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
- ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);
- ValueReturn = (UINT8) InternalSmBusNonBlock (
- V_PCH_SMBUS_SMB_CMD_BYTE_DATA,
- SmBusAddress | B_PCH_SMBUS_RW_SEL_READ,
- 0,
- Status
- );
- return ValueReturn;
-}
-
-/**
- Executes an SMBUS write data byte command.
-
- Executes an SMBUS write data byte command on the SMBUS device specified by SmBusAddress.
- The 8-bit value specified by Value is written.
- Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
- Value is returned.
- If Status is not NULL, then the status of the executed command is returned in Status.
- If Length in SmBusAddress is not zero, then ASSERT().
- If any reserved bits of SmBusAddress are set, then ASSERT().
-
- @param SmBusAddress Address that encodes the SMBUS Slave Address,
- SMBUS Command, SMBUS Data Length, and PEC.
- @param Value The 8-bit value to write.
- @param Status Return status for the executed command.
- This is an optional parameter and may be NULL.
-
- @return The parameter of Value.
-
-**/
-UINT8
-EFIAPI
-SmBusWriteDataByte (
- IN UINTN SmBusAddress,
- IN UINT8 Value,
- OUT RETURN_STATUS *Status OPTIONAL
- )
-{
- UINT8 ValueReturn = 0;
-
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
- ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);
-
- ValueReturn = (UINT8) InternalSmBusNonBlock (
- V_PCH_SMBUS_SMB_CMD_BYTE_DATA,
- SmBusAddress | B_PCH_SMBUS_RW_SEL_WRITE,
- Value,
- Status
- );
- return ValueReturn;
-
-}
-
-/**
- Executes an SMBUS read data word command.
-
- Executes an SMBUS read data word command on the SMBUS device specified by SmBusAddress.
- Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
- The 16-bit value read from the SMBUS is returned.
- If Status is not NULL, then the status of the executed command is returned in Status.
- If Length in SmBusAddress is not zero, then ASSERT().
- If any reserved bits of SmBusAddress are set, then ASSERT().
-
- @param SmBusAddress Address that encodes the SMBUS Slave Address,
- SMBUS Command, SMBUS Data Length, and PEC.
- @param Status Return status for the executed command.
- This is an optional parameter and may be NULL.
-
- @return The byte read from the SMBUS.
-
-**/
-UINT16
-EFIAPI
-SmBusReadDataWord (
- IN UINTN SmBusAddress,
- OUT RETURN_STATUS *Status OPTIONAL
- )
-{
- UINT16 ValueReturn = 0;
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
- ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);
-
- ValueReturn = InternalSmBusNonBlock (
- V_PCH_SMBUS_SMB_CMD_WORD_DATA,
- SmBusAddress | B_PCH_SMBUS_RW_SEL_READ,
- 0,
- Status
- );
- return ValueReturn;
-
-}
-
-/**
- Executes an SMBUS write data word command.
-
- Executes an SMBUS write data word command on the SMBUS device specified by SmBusAddress.
- The 16-bit value specified by Value is written.
- Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
- Value is returned.
- If Status is not NULL, then the status of the executed command is returned in Status.
- If Length in SmBusAddress is not zero, then ASSERT().
- If any reserved bits of SmBusAddress are set, then ASSERT().
-
- @param SmBusAddress Address that encodes the SMBUS Slave Address,
- SMBUS Command, SMBUS Data Length, and PEC.
- @param Value The 16-bit value to write.
- @param Status Return status for the executed command.
- This is an optional parameter and may be NULL.
-
- @return The parameter of Value.
-
-**/
-UINT16
-EFIAPI
-SmBusWriteDataWord (
- IN UINTN SmBusAddress,
- IN UINT16 Value,
- OUT RETURN_STATUS *Status OPTIONAL
- )
-{
- UINT16 ValueReturn = 0;
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
- ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);
-
- ValueReturn = InternalSmBusNonBlock (
- V_PCH_SMBUS_SMB_CMD_WORD_DATA,
- SmBusAddress | B_PCH_SMBUS_RW_SEL_WRITE,
- Value,
- Status
- );
- return ValueReturn;
-}
-
-/**
- Executes an SMBUS process call command.
-
- Executes an SMBUS process call command on the SMBUS device specified by SmBusAddress.
- The 16-bit value specified by Value is written.
- Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
- The 16-bit value returned by the process call command is returned.
- If Status is not NULL, then the status of the executed command is returned in Status.
- If Length in SmBusAddress is not zero, then ASSERT().
- If any reserved bits of SmBusAddress are set, then ASSERT().
-
- @param SmBusAddress Address that encodes the SMBUS Slave Address,
- SMBUS Command, SMBUS Data Length, and PEC.
- @param Value The 16-bit value to write.
- @param Status Return status for the executed command.
- This is an optional parameter and may be NULL.
-
- @return The 16-bit value returned by the process call command.
-
-**/
-UINT16
-EFIAPI
-SmBusProcessCall (
- IN UINTN SmBusAddress,
- IN UINT16 Value,
- OUT RETURN_STATUS *Status OPTIONAL
- )
-{
- UINT16 ValueReturn = 0;
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
- ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);
-
- ValueReturn = InternalSmBusNonBlock (
- V_PCH_SMBUS_SMB_CMD_PROCESS_CALL,
- SmBusAddress | B_PCH_SMBUS_RW_SEL_WRITE,
- Value,
- Status
- );
- return ValueReturn;
-}
-
-/**
- Executes an SMBUS block command.
-
- Executes an SMBUS block read, block write and block write-block read command
- on the SMBUS device specified by SmBusAddress.
- Bytes are read from the SMBUS and stored in Buffer.
- The number of bytes read is returned, and will never return a value larger than 32-bytes.
- If Status is not NULL, then the status of the executed command is returned in Status.
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
- SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.
-
- @param HostControl The value of Host Control Register to set.
- @param SmBusAddress Address that encodes the SMBUS Slave Address,
- SMBUS Command, SMBUS Data Length, and PEC.
- @param WriteBuffer Pointer to the buffer of bytes to write to the SMBUS.
- @param ReadBuffer Pointer to the buffer of bytes to read from the SMBUS.
- @param Status Return status for the executed command.
- This is an optional parameter and may be NULL.
-
- @return The number of bytes read from the SMBUS.
-
-**/
-UINTN
-InternalSmBusBlock (
- IN UINT8 HostControl,
- IN UINTN SmBusAddress,
- IN UINT8 *WriteBuffer,
- OUT UINT8 *ReadBuffer,
- OUT RETURN_STATUS *Status
- )
-{
- RETURN_STATUS ReturnStatus;
- UINTN Index;
- UINTN BytesCount;
- UINTN IoPortBaseAddress;
- UINT8 AuxiliaryControl;
-
- IoPortBaseAddress = InternalGetSmbusIoPortBaseAddress ();
-
- BytesCount = SMBUS_LIB_LENGTH (SmBusAddress);
-
- //
- // Try to acquire the ownership of ICH SMBUS.
- //
- ReturnStatus = InternalSmBusAcquire (IoPortBaseAddress);
- if (RETURN_ERROR (ReturnStatus)) {
- goto Done;
- }
-
- //
- // Set the appropriate Host Control Register and auxiliary Control Register.
- //
- AuxiliaryControl = B_PCH_SMBUS_E32B;
- if (SMBUS_LIB_PEC (SmBusAddress)) {
- AuxiliaryControl |= B_PCH_SMBUS_AAC;
- HostControl |= B_PCH_SMBUS_PEC_EN;
- }
-
- //
- // Set Host Command Register.
- //
- IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HCMD, (UINT8) SMBUS_LIB_COMMAND (SmBusAddress));
-
- //
- // Set Auxiliary Control Regiester.
- //
- IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_AUXC, AuxiliaryControl);
-
- //
- // Clear byte pointer of 32-byte buffer.
- //
- IoRead8 (IoPortBaseAddress + R_PCH_SMBUS_HCTL);
-
- if (WriteBuffer != NULL) {
- //
- // Write the number of block to Host Block Data Byte Register.
- //
- IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HD0, (UINT8) BytesCount);
-
- //
- // Write data block to Host Block Data Register.
- //
- for (Index = 0; Index < BytesCount; Index++) {
- IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HBD, WriteBuffer[Index]);
- }
- }
-
- //
- // Set SMBUS slave address for the device to send/receive from.
- //
- IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_TSA, (UINT8) SmBusAddress);
-
- //
- // Start the SMBUS transaction and wait for the end.
- //
- ReturnStatus = InternalSmBusStart (IoPortBaseAddress, HostControl);
- if (RETURN_ERROR (ReturnStatus)) {
- goto Done;
- }
-
- if (ReadBuffer != NULL) {
- //
- // Read the number of block from host block data byte register.
- //
- BytesCount = IoRead8 (IoPortBaseAddress + R_PCH_SMBUS_HD0);
-
- //
- // Write data block from Host Block Data Register.
- //
- for (Index = 0; Index < BytesCount; Index++) {
- ReadBuffer[Index] = IoRead8 (IoPortBaseAddress + R_PCH_SMBUS_HBD);
- }
- }
-
-Done:
- //
- // Clear Host Status Register and Auxiliary Status Register.
- //
- IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HSTS, B_PCH_SMBUS_HSTS_ALL);
- IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_AUXS, B_PCH_SMBUS_CRCE);
-
- if (Status != NULL) {
- *Status = ReturnStatus;
- }
-
- return BytesCount;
-}
-
-/**
- Executes an SMBUS read block command.
-
- Executes an SMBUS read block command on the SMBUS device specified by SmBusAddress.
- Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
- Bytes are read from the SMBUS and stored in Buffer.
- The number of bytes read is returned, and will never return a value larger than 32-bytes.
- If Status is not NULL, then the status of the executed command is returned in Status.
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
- SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.
- If Length in SmBusAddress is not zero, then ASSERT().
- If Buffer is NULL, then ASSERT().
- If any reserved bits of SmBusAddress are set, then ASSERT().
-
- @param SmBusAddress Address that encodes the SMBUS Slave Address,
- SMBUS Command, SMBUS Data Length, and PEC.
- @param Buffer Pointer to the buffer to store the bytes read from the SMBUS.
- @param Status Return status for the executed command.
- This is an optional parameter and may be NULL.
-
- @return The number of bytes read.
-
-**/
-UINTN
-EFIAPI
-SmBusReadBlock (
- IN UINTN SmBusAddress,
- OUT VOID *Buffer,
- OUT RETURN_STATUS *Status OPTIONAL
- )
-{
- UINTN BytesCount = 0;
-
- ASSERT (Buffer != NULL);
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);
- ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);
-
-
- BytesCount = InternalSmBusBlock (
- V_PCH_SMBUS_SMB_CMD_BLOCK,
- SmBusAddress | B_PCH_SMBUS_RW_SEL_READ,
- NULL,
- Buffer,
- Status
- );
- return BytesCount;
-
-}
-
-/**
- Executes an SMBUS write block command.
-
- Executes an SMBUS write block command on the SMBUS device specified by SmBusAddress.
- The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.
- Bytes are written to the SMBUS from Buffer.
- The number of bytes written is returned, and will never return a value larger than 32-bytes.
- If Status is not NULL, then the status of the executed command is returned in Status.
- If Length in SmBusAddress is zero or greater than 32, then ASSERT().
- If Buffer is NULL, then ASSERT().
- If any reserved bits of SmBusAddress are set, then ASSERT().
-
- @param SmBusAddress Address that encodes the SMBUS Slave Address,
- SMBUS Command, SMBUS Data Length, and PEC.
- @param Buffer Pointer to the buffer to store the bytes read from the SMBUS.
- @param Status Return status for the executed command.
- This is an optional parameter and may be NULL.
-
- @return The number of bytes written.
-
-**/
-UINTN
-EFIAPI
-SmBusWriteBlock (
- IN UINTN SmBusAddress,
- OUT VOID *Buffer,
- OUT RETURN_STATUS *Status OPTIONAL
- )
-{
- UINTN BytesCount = 0;
-
- ASSERT (Buffer != NULL);
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) >= 1);
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) <= 32);
- ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);
-
-
- BytesCount = InternalSmBusBlock (
-
- V_PCH_SMBUS_SMB_CMD_BLOCK,
- SmBusAddress | B_PCH_SMBUS_RW_SEL_WRITE,
- Buffer,
- NULL,
- Status
- );
-
- return BytesCount;
-}
-
-/**
- Executes an SMBUS block process call command.
-
- Executes an SMBUS block process call command on the SMBUS device specified by SmBusAddress.
- The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.
- Bytes are written to the SMBUS from WriteBuffer. Bytes are then read from the SMBUS into ReadBuffer.
- If Status is not NULL, then the status of the executed command is returned in Status.
- It is the caller's responsibility to make sure ReadBuffer is large enough for the total number of bytes read.
- SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.
- If Length in SmBusAddress is zero or greater than 32, then ASSERT().
- If WriteBuffer is NULL, then ASSERT().
- If ReadBuffer is NULL, then ASSERT().
- If any reserved bits of SmBusAddress are set, then ASSERT().
-
- @param SmBusAddress Address that encodes the SMBUS Slave Address,
- SMBUS Command, SMBUS Data Length, and PEC.
- @param WriteBuffer Pointer to the buffer of bytes to write to the SMBUS.
- @param ReadBuffer Pointer to the buffer of bytes to read from the SMBUS.
- @param Status Return status for the executed command.
- This is an optional parameter and may be NULL.
-
- @return The number of bytes written.
-
-**/
-UINTN
-EFIAPI
-SmBusBlockProcessCall (
- IN UINTN SmBusAddress,
- IN VOID *WriteBuffer,
- OUT VOID *ReadBuffer,
- OUT RETURN_STATUS *Status OPTIONAL
- )
-{
- UINTN BytesCount = 0;
-
- ASSERT (WriteBuffer != NULL);
- ASSERT (ReadBuffer != NULL);
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) >= 1);
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) <= 32);
- ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);
-
- BytesCount = InternalSmBusBlock (
- V_PCH_SMBUS_SMB_CMD_BLOCK_PROCESS,
- SmBusAddress | B_PCH_SMBUS_RW_SEL_WRITE,
- WriteBuffer,
- ReadBuffer,
- Status
- );
- return BytesCount;
-
- }
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/SmbusLib/SmbusLib.inf b/Platform/Intel/Vlv2TbltDevicePkg/Library/SmbusLib/SmbusLib.inf deleted file mode 100644 index b13e3de0..00000000 --- a/Platform/Intel/Vlv2TbltDevicePkg/Library/SmbusLib/SmbusLib.inf +++ /dev/null @@ -1,46 +0,0 @@ -## @file
-# Component description file for Intel Ich9 Smbus Library.
-#
-# SMBUS Library that layers on top of the I/O Library to directly
-# access a standard SMBUS host controller.
-# Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
-#
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-
-#
-#
-#
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = SmbusLib
- FILE_GUID = 0558CAEA-FEF3-4b6d-915E-8742EFE6DEE1
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = SmbusLib
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64 EBC
-#
-
-[Sources]
- SmbusLib.c
-
-[Packages]
- Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec
- MdePkg/MdePkg.dec
- Vlv2TbltDevicePkg/PlatformPkg.dec
-
-[LibraryClasses]
- PcdLib
- DebugLib
- PciLib
- IoLib
-
-[Pcd.common]
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
-
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/Dimm.c b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/Dimm.c deleted file mode 100644 index 3fda6313..00000000 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/Dimm.c +++ /dev/null @@ -1,319 +0,0 @@ -/** @file
-
- Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-
-
-Module Name:
-
-
- Dimm.c
-
-Abstract:
-
- PPI for reading SPD modules on DIMMs.
-
---*/
-
-
-//
-// Header Files
-//
-#include "Platformearlyinit.h"
-
-#define DIMM_SOCKETS 4 // Total number of DIMM sockets allowed on
- // the platform
-#define DIMM_SEGMENTS 1 // Total number of Segments Per DIMM.
-#define MEMORY_CHANNELS 2 // Total number of memory channels
- // populated on the system board
-//
-// Prototypes
-//
-
-EFI_STATUS
-EFIAPI
-GetDimmState (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_PLATFORM_DIMM_PPI *This,
- IN UINT8 Dimm,
- OUT PEI_PLATFORM_DIMM_STATE *State
- );
-
-EFI_STATUS
-EFIAPI
-SetDimmState (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_PLATFORM_DIMM_PPI *This,
- IN UINT8 Dimm,
- IN PEI_PLATFORM_DIMM_STATE *State
- );
-
-EFI_STATUS
-EFIAPI
-ReadSpd (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_PLATFORM_DIMM_PPI *This,
- IN UINT8 Dimm,
- IN UINT8 Offset,
- IN UINTN Count,
- IN OUT UINT8 *Buffer
- );
-
-static PEI_PLATFORM_DIMM_PPI mGchDimmPpi = {
- DIMM_SOCKETS,
- DIMM_SEGMENTS,
- MEMORY_CHANNELS,
- GetDimmState,
- SetDimmState,
- ReadSpd
-};
-
-static EFI_PEI_PPI_DESCRIPTOR mPpiPlatformDimm = {
- (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
- &gPeiPlatformDimmPpiGuid,
- &mGchDimmPpi
-};
-
-
-//
-// Functions
-//
-
-/**
- This function returns the current state of a single DIMM. Present indicates
- that the DIMM slot is physically populated. Disabled indicates that the DIMM
- should not be used.
-
- @param PeiServices PEI services table pointer
- @param This PPI pointer
- @param Dimm DIMM to read from
- @param State Pointer to a return buffer to be updated with the current state
- of the DIMM
-
- @retval EFI_SUCCESS The function completed successfully.
-
-**/
-EFI_STATUS
-EFIAPI
-GetDimmState (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_PLATFORM_DIMM_PPI *This,
- IN UINT8 Dimm,
- OUT PEI_PLATFORM_DIMM_STATE *State
- )
-{
- EFI_STATUS Status;
- UINT8 Buffer;
-
- PEI_ASSERT (PeiServices, (Dimm < This->DimmSockets));
-
- //
- // A failure here does not necessarily mean that no DIMM is present.
- // Read a single byte. All we care about is the return status.
- //
- Status = ReadSpd (
- PeiServices,
- This,
- Dimm,
- 0,
- 1,
- &Buffer
- );
-
- if (EFI_ERROR (Status)) {
- State->Present = 0;
- } else {
- State->Present = 1;
- }
-
- //
- // BUGBUG: Update to check platform variable when it is available
- //
- State->Disabled = 0;
- State->Reserved = 0;
-
- return EFI_SUCCESS;
-}
-
-/**
-
- This function updates the state of a single DIMM.
-
- @param PeiServices PEI services table pointer
- @param This PPI pointer
- @param Dimm DIMM to set state for
- @param State Pointer to the state information to set.
-
- @retval EFI_SUCCESS The function completed successfully.
- @retval EFI_UNSUPPORTED The function is not supported.
-
-**/
-EFI_STATUS
-EFIAPI
-SetDimmState (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_PLATFORM_DIMM_PPI *This,
- IN UINT8 Dimm,
- IN PEI_PLATFORM_DIMM_STATE *State
- )
-{
- return EFI_UNSUPPORTED;
-}
-
-/**
- This function reads SPD information from a DIMM.
-
- PeiServices PEI services table pointer
- This PPI pointer
- Dimm DIMM to read from
- Offset Offset in DIMM
- Count Number of bytes
- Buffer Return buffer
-
- @param EFI_SUCCESS The function completed successfully.
- @param EFI_DEVICE_ERROR The DIMM being accessed reported a device error,
- does not have an SPD module, or is not installed in
- the system.
- @retval EFI_TIMEOUT Time out trying to read the SPD module.
- @retval EFI_INVALID_PARAMETER A parameter was outside the legal limits.
-
-**/
-EFI_STATUS
-EFIAPI
-ReadSpd (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_PLATFORM_DIMM_PPI *This,
- IN UINT8 Dimm,
- IN UINT8 Offset,
- IN UINTN Count,
- IN OUT UINT8 *Buffer
- )
-{
- EFI_STATUS Status;
- PEI_SMBUS_PPI *Smbus;
- UINTN Index;
- UINTN Index1;
- EFI_SMBUS_DEVICE_ADDRESS SlaveAddress;
- EFI_SMBUS_DEVICE_COMMAND Command;
- UINTN Length;
-
- Status = (**PeiServices).LocatePpi (
- PeiServices,
- &gPeiSmbusPpiGuid, // GUID
- 0, // INSTANCE
- NULL, // EFI_PEI_PPI_DESCRIPTOR
- &Smbus // PPI
- );
- ASSERT_PEI_ERROR (PeiServices, Status);
-
- switch (Dimm) {
- case 0:
- SlaveAddress.SmbusDeviceAddress = SMBUS_ADDR_CH_A_1 >> 1;
- break;
- case 1:
- SlaveAddress.SmbusDeviceAddress = SMBUS_ADDR_CH_A_2 >> 1;
- break;
- case 2:
- SlaveAddress.SmbusDeviceAddress = SMBUS_ADDR_CH_B_1 >> 1;
- break;
- case 3:
- SlaveAddress.SmbusDeviceAddress = SMBUS_ADDR_CH_B_2 >> 1;
- break;
- default:
- return EFI_INVALID_PARAMETER;
- }
-
- Index = Count % 4;
- if (Index != 0) {
- //
- // read the first serveral bytes to speed up following reading
- //
- for (Index1 = 0; Index1 < Index; Index1++) {
- Length = 1;
- Command = Offset + Index1;
- Status = Smbus->Execute (
- PeiServices,
- Smbus,
- SlaveAddress,
- Command,
- EfiSmbusReadByte,
- FALSE,
- &Length,
- &Buffer[Index1]
- );
- if (EFI_ERROR(Status)) {
- return Status;
- }
- }
- }
-
- //
- // Now collect all the remaining bytes on 4 bytes block
- //
- for (; Index < Count; Index += 2) {
- Command = Index + Offset;
- Length = 2;
- Status = Smbus->Execute (
- PeiServices,
- Smbus,
- SlaveAddress,
- Command,
- EfiSmbusReadWord,
- FALSE,
- &Length,
- &Buffer[Index]
- );
- if (EFI_ERROR(Status)) {
- return Status;
- }
-
- Index += 2;
- Command = Index + Offset;
- Length = 2;
- Status = Smbus->Execute (
- PeiServices,
- Smbus,
- SlaveAddress,
- Command,
- EfiSmbusReadWord,
- FALSE,
- &Length,
- &Buffer[Index]
- );
- if (EFI_ERROR(Status)) {
- return Status;
- }
- }
- return EFI_SUCCESS;
-}
-
-/**
- This function initializes the PEIM. It simply installs the DIMM PPI.
-
- @param FfsHeader Not used by this function
- @param PeiServices Pointer to PEI services table
-
- @retval EFI_SUCCESS The function completed successfully.
-
-**/
-EFI_STATUS
-EFIAPI
-PeimInitializeDimm (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
- IN VOID *SmbusPpi
- )
-{
- EFI_STATUS Status;
-
- Status = (**PeiServices).InstallPpi (
- PeiServices,
- &mPpiPlatformDimm
- );
- ASSERT_PEI_ERROR (PeiServices, Status);
-
- return EFI_SUCCESS;
-}
-
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h index 9631d49a..6a2ecf8f 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h @@ -59,7 +59,7 @@ Abstract: #include <Ppi/Speaker.h>
#include <Guid/MemoryTypeInformation.h>
#include <Ppi/Cache.h>
-#include <Ppi/Smbus.h>
+#include <Ppi/Smbus2.h>
#include <Library/PchPlatformLib.h>
#include <Ppi/SmbusPolicy.h>
#include <Ppi/Reset.h>
@@ -1454,14 +1454,6 @@ SetDxeCacheMode ( IN CONST EFI_PEI_SERVICES **PeiServices
);
-EFI_STATUS
-GPIO_initialization (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
- IN VOID *SmbusPpi
- );
-
-
BOOLEAN
IsRtcUipAlwaysSet (
IN CONST EFI_PEI_SERVICES **PeiServices
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/CommonHeader.h b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/CommonHeader.h index a533f391..c18cabb2 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/CommonHeader.h +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/CommonHeader.h @@ -42,7 +42,6 @@ #include <Library/PciLib.h>
#include <Library/ReportStatusCodeLib.h>
#include <Library/PcdLib.h>
-#include <Library/SmbusLib.h>
#include <Library/TimerLib.h>
#include <Library/PrintLib.h>
#include <Library/ResetSystemLib.h>
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf index 28a5274c..d3969f23 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf @@ -72,7 +72,6 @@ DebugLib HobLib IoLib - MultiPlatformLib MtrrLib PerformanceLib MonoStatusCodeLib diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc index b16883e9..3910281c 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc @@ -171,7 +171,7 @@ #
# ICH
#
- SmbusLib|Vlv2TbltDevicePkg/Library/SmbusLib/SmbusLib.inf
+ SmbusLib|MdePkg/Library/BaseSmbusLibNull/BaseSmbusLibNull.inf
SmmLib|Vlv2TbltDevicePkg/Library/PchSmmLib/PchSmmLib.inf
#
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc index c9335a98..2ae594e5 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc @@ -169,7 +169,7 @@ #
# ICH
#
- SmbusLib|Vlv2TbltDevicePkg/Library/SmbusLib/SmbusLib.inf
+ SmbusLib|MdePkg/Library/BaseSmbusLibNull/BaseSmbusLibNull.inf
SmmLib|Vlv2TbltDevicePkg/Library/PchSmmLib/PchSmmLib.inf
#
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc index fd9ddebf..5cdc9beb 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc @@ -171,7 +171,7 @@ #
# ICH
#
- SmbusLib|Vlv2TbltDevicePkg/Library/SmbusLib/SmbusLib.inf
+ SmbusLib|MdePkg/Library/BaseSmbusLibNull/BaseSmbusLibNull.inf
SmmLib|Vlv2TbltDevicePkg/Library/PchSmmLib/PchSmmLib.inf
#
|