diff options
| author | Michael D Kinney <michael.d.kinney@intel.com> | 2019-07-08 15:03:25 -0700 |
|---|---|---|
| committer | Michael D Kinney <michael.d.kinney@intel.com> | 2019-07-12 17:29:41 -0700 |
| commit | 6a728b4b7d6b45a9e044f3fe261f732b0f1958e2 (patch) | |
| tree | 3138c3e75130b03a4474c52ce1e97c4860941028 /Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei | |
| parent | e286c36ae4c07cfa6496e779dae2616eb34f6f3c (diff) | |
Vlv2TbltDevicePkg: Add GCC IA32 build support
* Remove CpuIa32Lib that contains inline assembly
that is not compatible with GCC builds. Use BaseLib
functions for CPUID and MSR access and the CPUID and
MSR defintions from the UefiCpuPkg.
* Add PlatformPkgGccIa32.dsc
* Add /IA32 flag to Build_IFWI.sh
* Add /IA32 flag to bld_vlv.sh
* Remove unused references to gEfiPlatformCpuInfoGuid
Cc: Zailiang Sun <zailiang.sun@intel.com>
Cc: Yi Qian <yi.qian@intel.com>
Cc: Gary Lin <glin@suse.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Zailiang Sun <zailiang.sun@intel.com>
Diffstat (limited to 'Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei')
3 files changed, 7 insertions, 9 deletions
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/MemoryCallback.c b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/MemoryCallback.c index 074bf7de..61ecc52c 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/MemoryCallback.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/MemoryCallback.c @@ -124,7 +124,8 @@ MemoryDiscoveredPpiNotifyCallback ( {
EFI_STATUS Status;
EFI_BOOT_MODE BootMode;
- EFI_CPUID_REGISTER FeatureInfo;
+ UINT32 MaximumExtendedFunction;
+ CPUID_VIR_PHY_ADDRESS_SIZE_EAX Eax;
UINT8 CpuAddressWidth;
UINT16 Pm1Cnt;
EFI_PEI_HOB_POINTERS Hob;
@@ -279,10 +280,10 @@ MemoryDiscoveredPpiNotifyCallback ( // Create a CPU hand-off information
//
CpuAddressWidth = 32;
- AsmCpuid (EFI_CPUID_EXTENDED_FUNCTION, &FeatureInfo.RegEax, &FeatureInfo.RegEbx, &FeatureInfo.RegEcx, &FeatureInfo.RegEdx);
- if (FeatureInfo.RegEax >= EFI_CPUID_VIRT_PHYS_ADDRESS_SIZE) {
- AsmCpuid (EFI_CPUID_VIRT_PHYS_ADDRESS_SIZE, &FeatureInfo.RegEax, &FeatureInfo.RegEbx, &FeatureInfo.RegEcx, &FeatureInfo.RegEdx);
- CpuAddressWidth = (UINT8) (FeatureInfo.RegEax & 0xFF);
+ AsmCpuid (CPUID_EXTENDED_FUNCTION, &MaximumExtendedFunction, NULL, NULL, NULL);
+ if (MaximumExtendedFunction >= CPUID_VIR_PHY_ADDRESS_SIZE) {
+ AsmCpuid (CPUID_VIR_PHY_ADDRESS_SIZE, &Eax.Uint32, NULL, NULL, NULL);
+ CpuAddressWidth = (UINT8) (Eax.Bits.PhysicalAddressBits);
}
BuildCpuHob(CpuAddressWidth, 16);
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h index 6a2ecf8f..8c02adba 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h @@ -53,7 +53,7 @@ Abstract: #include <Library/BaseLib.h>
#include <Library/PeiServicesLib.h>
#include <Library/MtrrLib.h>
-#include <Library/CpuIA32.h>
+#include <Register/Cpuid.h>
#include <IndustryStandard/Pci22.h>
#include <Ppi/Speaker.h>
@@ -95,8 +95,6 @@ Abstract: #define SMBIOS_WAKEUP_TYPE_PCI_PME 0x07
#define SMBIOS_WAKEUP_TYPE_AC_POWER_RESTORED 0x08
-#define EFI_CPUID_VIRT_PHYS_ADDRESS_SIZE 0x80000008
-
//
// Defines for stall ppi
//
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformInitPei.inf b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformInitPei.inf index eeb9a4a0..8350cf47 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformInitPei.inf +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformInitPei.inf @@ -78,7 +78,6 @@ ENTRY_POINT = PlatformEarlyInitEntry gEfiSetupVariableGuid gEfiPlatformInfoGuid gEfiPlatformBootModeGuid - gEfiPlatformCpuInfoGuid gEfiGlobalVariableGuid gRecoveryOnFatFloppyDiskGuid gRecoveryOnFatUsbDiskGuid |