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authorMing Huang <ming.huang@linaro.org>2018-11-16 09:32:37 +0800
committerLeif Lindholm <leif.lindholm@linaro.org>2018-11-19 18:41:18 +0000
commitce4f7528ed7130065357f2a559b417749dd1348b (patch)
tree46101676a78132e1b72700563e1ba002917543a2 /Platform/Hisilicon
parent6cd358a4552192d496c4ff81977dc8534d681e5e (diff)
Hisilicon/D06: Correct HIDs/UIDs of PCI host bridges
Synchronize PCI host bridges device path with the HIDs/UIDs used in the DSDT/SSDT for PCIe. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang <ming.huang@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'Platform/Hisilicon')
-rw-r--r--Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.c28
1 files changed, 14 insertions, 14 deletions
diff --git a/Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.c b/Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.c
index d1a436d9..d13178e9 100644
--- a/Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.c
+++ b/Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.c
@@ -75,8 +75,8 @@ STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath [ENUM_HB_NUM]
(UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8)
}
},
- EISA_PNP_ID(0x0A04), // PCI
- 0
+ EISA_PNP_ID(0x0A03), // PCI
+ 2
},
{
END_DEVICE_PATH_TYPE,
@@ -99,8 +99,8 @@ STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath [ENUM_HB_NUM]
(UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8)
}
},
- EISA_PNP_ID(0x0A05), // PCI
- 0
+ EISA_PNP_ID(0x0A03), // PCI
+ 4
},
{
END_DEVICE_PATH_TYPE,
@@ -123,8 +123,8 @@ STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath [ENUM_HB_NUM]
(UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8)
}
},
- EISA_PNP_ID(0x0A06), // PCI
- 0
+ EISA_PNP_ID(0x0A03), // PCI
+ 5
},
{
END_DEVICE_PATH_TYPE,
@@ -147,8 +147,8 @@ STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath [ENUM_HB_NUM]
(UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8)
}
},
- EISA_PNP_ID(0x0A07), // PCI
- 0
+ EISA_PNP_ID(0x0A03), // PCI
+ 6
},
{
END_DEVICE_PATH_TYPE,
@@ -171,8 +171,8 @@ STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath [ENUM_HB_NUM]
(UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8)
}
},
- EISA_PNP_ID(0x0A08), // PCI
- 0
+ EISA_PNP_ID(0x0A03), // PCI
+ 8
},
{
END_DEVICE_PATH_TYPE,
@@ -195,8 +195,8 @@ STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath [ENUM_HB_NUM]
(UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8)
}
},
- EISA_PNP_ID(0x0A09), // PCI
- 0
+ EISA_PNP_ID(0x0A03), // PCI
+ 10
},
{
END_DEVICE_PATH_TYPE,
@@ -219,8 +219,8 @@ STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath [ENUM_HB_NUM]
(UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8)
}
},
- EISA_PNP_ID(0x0A0A), // PCI
- 0
+ EISA_PNP_ID(0x0A03), // PCI
+ 11
},
{
END_DEVICE_PATH_TYPE,