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Signed-off-by: Andy Green <andy.green@linaro.org>
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This teaches smdtty that ch3 (HCI) and ch2 (ACL) are related, and deals with
faking up and removing the channel usage type byte expected by UART HCI protocol.
This is enough that you can just point bluez to /dev/smd3 with no patches needed
on bluez.
Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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wcn3620 prima firmware exposes more capabilities than known about
in the mainline driver, they're reported as "unknown" at probe.
This adds the extra capabilities so they can at least be reported
correctly.
Signed-off-by: Andy Green <andy.green@linaro.org>
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Simplify the resource handling and use DT to indicate which chip type
we are dealing with
Signed-off-by: Andy Green <andy.green@linaro.org>
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AG modified to remove regulator handling not needed on msm8916-qrd
Signed-off-by: Eugene Krasnikov <k.eugene.e@gmail.com>
Signed-off-by: Andy Green <andy.green@linaro.org>
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On wcn3620, firmware response to remove_bsskey uses the new, larger
"v2" format
Signed-off-by: Andy Green <andy.green@linaro.org>
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On wcn3620, firmware response to trigger_ba uses the new, larger
"v2" format
Signed-off-by: Andy Green <andy.green@linaro.org>
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wcn3620 has a new message structure for the reply to some hal
commands. This patch adds the struct and helper routine that
uses it if the chip is wcn3620, or falls back to the old
helper routine.
We don't know what to do with the candidate list he sends back,
but we can at least accept and ignore it nicely instead of dying.
Signed-off-by: Andy Green <andy.green@linaro.org>
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WCN3620 powersaving mode is not stable. Disable it if we're
on a wcn3620 chip type.
Signed-off-by: Andy Green <andy.green@linaro.org>
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WCN3620 can asynchronously send two new kinds of indication message,
since we can't handle them just accept them quietly.
v2: used one break for both in the second stanza
Signed-off-by: Andy Green <andy.green@linaro.org>
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WCN3620 firmware introduces a new async indication, we need to
add it as a known message type so we can accept it
Signed-off-by: Andy Green <andy.green@linaro.org>
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Between 3620, 3660 and 3680, only 3660 has a different dxe register
Signed-off-by: Andy Green <andy.green@linaro.org>
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Autodetecting the chip type does not work well.
Stop attempting to do it and require a platform op
that tells us what the chip is.
Signed-off-by: Andy Green <andy.green@linaro.org>
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Convert the list of chip types to an enum, add the default
UNKNOWN type and a type for WCN3620 chip
Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Bob Copeland <me@bobcopeland.com>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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PIL is Qualcomm's Peripheral Image Loader
It deals with initializing whole subsystems with magic firmware
Signed-off-by: Andy Green <andy.green@linaro.org>
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listing the regulators for sd or emmc kills them (no clock on sd)
Half-works with no vmmc listed on sd dies complaining no matching voltage
disabled for now.
Signed-off-by: Andy Green <andy.green@linaro.org>
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This lets the eMMC (alone) get probed.
Signed-off-by: Andy Green <andy.green@linaro.org>
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This adds simplefb support for msm8916.
It leverages the framebuffer initialization done by the bootloader
to provide a normal framebuffer in Linux (good enough for Xorg)
We have to default the unucked clocks disable otherwise fb is killed
at that point.
Signed-off-by: Andy Green <andy.green@linaro.org>
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This is the minimal delta needed to boot the msm8916, forward-ported from
the stock 3.10 kernel.
Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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This little commandline tool lets you control the state of DTR#
on a /dev/ttyUSB... this allows you to control battery power on
the msm8916 shim development board
Signed-off-by: Andy Green <andy.green@linaro.org>
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Qualcomm PMIC Arbiter version-2 changes from version-1 are:
- Some diffrent register offsets.
- New channel register space, one per PMIC peripheral (ppid).
All tx tarffic uses these channels.
- New observer register space. All rx trafic uses this space.
- Diffrent command format for spmi command registers.
Signed-off-by: Gilad Avidov <gavidov@xxxxxxxxxxxxxx>
Acked-by: Sagar Dharia <sdharia@xxxxxxxxxxxxxx>
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The secure world only knows about 32-bit wide physical addresses
for the boot API. Clarify the kernel interface by explicitly
stating a u32 instead of phys_addr_t which could be 32 or 64 bits
depending on LPAE or not.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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Follow the scm.c and move scm-boot files to drivers/soc/qcom. The
guidance is to clean files out from mach-qcom and move to drivers/soc
area.
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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Quad core targets like APQ8074, APQ8064, APQ8084 need SCM support set up
warm boot addresses in the Secure Monitor. Extend the SCM flags to
support warmboot addresses for secondary cores.
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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The atomic SCM APIs are useful for commands that are guaranteed by the
secure side to be uninterruptable, atomic and SMP safe. The calling
convention use registers for passing parameters and return values between
the secure and non-secure side. Support this interface with
scm_call_atomic[1-2]() functions corresponding to the number of arguments
passed.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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Architectural changes in the ARM Linux kernel tree mandate the eventual
removal of the mach-* directories. Move the scm driver to
drivers/soc/qcom and the scm header to include/soc/qcom to support that
removal.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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Some users of SCM need to detect features and also detect if
those features have certain versions available. Add this API.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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Some drivers may need to query the secure environment about the
availability of a particular service/command. Add support for
this.
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
[sboyd@codeaurora.org: Add some commit text]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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When an error occurs during an scm call the error returned is remapped so
we lose the original error code. This means that when an error occurs we
have no idea what actually failed within the secure environment.
Add a logging statement that will log the actual error code from scm call
allowing us to easily determine what caused the error to occur.
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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scm_call flushes the entire cache before calling into the secure world.
This is both a performance penalty as well as insufficient on SMP systems
where the CPUs possess a write-back L1 cache. Flush only the command and
response buffers instead, moving the responsibility of flushing any other
cached buffer (being passed to the secure world) to callers.
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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Instead of hardcoding the cacheline size as 32, get the cacheline size from
the CTR register.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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The cache invalidation in scm_call() correctly rounds down the start
address to invalidate the beginning of the cacheline but doesn't properly
round up the 'end' address to make it aligned. The last chunk of the
buffer won't be invalidated when 'end' is not cacheline size aligned so
make sure to invalidate the last few bytes in such situations. It also
doesn't do anything about outer caches so make sure to invalidate and flush
those as well.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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We can run qcom platforms in big-endian mode. Select the option.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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If the CPU is in big-endian mode these macros will access the
hardware incorrectly. Reverse thins as necessary to fix this.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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Add another SoC address for apq8064 and use DEBUG_UART_VIRT
instead of DEBUG_UART_BASE because the former actually exists.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"We've been sitting on our fixes branch for a while, so this batch is
unfortunately on the large side.
A lot of these are tweaks and fixes to device trees, fixing various
bugs around clocks, reg ranges, etc. There's also a few defconfig
updates (which are on the late side, no more of those).
All in all the diffstat is bigger than ideal at this time, but nothing
in here seems particularly risky"
* tag 'armsoc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (31 commits)
reset: sunxi: fix spinlock initialization
ARM: dts: disable CCI on exynos5420 based arndale-octa
drivers: bus: check cci device tree node status
ARM: rockchip: disable jtag/sdmmc autoswitching on rk3288
ARM: nomadik: fix up leftover device tree pins
ARM: at91: board-dt-sama5: add phy_fixup to override NAND_Tree
ARM: at91/dt: sam9263: Add missing clocks to lcdc node
ARM: at91: sama5d3: dt: correct the sound route
ARM: at91/dt: sama5d4: fix the timer reg length
ARM: exynos_defconfig: Enable LM90 driver
ARM: exynos_defconfig: Enable options for display panel support
arm: dts: Use pmu_system_controller phandle for dp phy
ARM: shmobile: sh73a0 legacy: Set .control_parent for all irqpin instances
ARM: dts: berlin: correct BG2Q's SM GPIO location.
ARM: dts: berlin: add broken-cd and set bus width for eMMC in Marvell DMP DT
ARM: dts: berlin: fix io clk and add missing core clk for BG2Q sdhci2 host
ARM: dts: Revert disabling of smc91x for n900
ARM: dts: imx51-babbage: Fix ULPI PHY reset modelling
ARM: dts: dra7-evm: fix qspi device tree partition size
ARM: omap2plus_defconfig: use CONFIG_CPUFREQ_DT
...
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git://git.linaro.org/people/mike.turquette/linux
Pull clock driver fixes from Mike Turquette:
"Small number of fixes for clock drivers and a single null pointer
dereference fix in the framework core code.
The driver fixes vary from fixing section mismatch warnings to
preventing machines from hanging (and preventing developers from
crying)"
* tag 'clk-fixes-for-linus' of git://git.linaro.org/people/mike.turquette/linux:
clk: fix possible null pointer dereference
Revert "clk: ppc-corenet: Fix Section mismatch warning"
clk: rockchip: fix deadlock possibility in cpuclk
clk: berlin: bg2q: remove non-exist "smemc" gate clock
clk: at91: keep slow clk enabled to prevent system hang
clk: rockchip: fix rk3288 cpuclk core dividers
clk: rockchip: fix rk3066 pll lock bit location
clk: rockchip: Fix clock gate for rk3188 hclk_emem_peri
clk: rockchip: add CLK_IGNORE_UNUSED flag to fix rk3066/rk3188 USB Host
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git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
Pull SCSI fixes from James Bottomley:
"This is one fix for a Multiqueue sleeping in invalid context problem
and a MAINTAINER file update for Qlogic"
* tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi:
scsi: ->queue_rq can't sleep
MAINTAINERS: Update maintainer list for qla4xxx
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The commit 646cafc6 (clk: Change clk_ops->determine_rate to
return a clk_hw as the best parent) opens a possibility for
null pointer dereference, fix this.
Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
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This reverts commit da788acb28386aa896224e784954bb73c99ff26c.
That commit tried to fix the section mismatch warning by moving the
ppc_corenet_clk_driver struct to init section. This is definitely wrong
because the kernel would free the memories occupied by this struct
after boot while this driver is still registered in the driver core.
The kernel would panic when accessing this driver struct.
Cc: stable@vger.kernel.org # 3.17
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
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Lockdep reported a possible deadlock between the cpuclk lock and for example
the i2c driver.
CPU0 CPU1
---- ----
lock(clk_lock);
local_irq_disable();
lock(&(&i2c->lock)->rlock);
lock(clk_lock);
<Interrupt>
lock(&(&i2c->lock)->rlock);
*** DEADLOCK ***
The generic clock-types of the core ccf already use spin_lock_irqsave when
touching clock registers, so do the same for the cpuclk.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
[mturquette@linaro.org: removed initialization of "flags"]
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Pull dmaengine fixes from Vinod Koul:
"Two patches, the first by Andy to fix dw dmac runtime pm and second
one by me to fix the dmaengine headers in MAINTAINERS"
* 'fixes' of git://git.infradead.org/users/vkoul/slave-dma:
dmaengine: dw: balance PM runtime calls
MAINTAINERS: dmaengine: fix the header file for dmaengine
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf fixes from Ingo Molnar:
"Mostly tooling fixes, but also two PMU driver fixes"
* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
perf tools powerpc: Use dwfl_report_elf() instead of offline.
perf tools: Fix segfault for symbol annotation on TUI
perf test: Fix dwarf unwind using libunwind.
perf tools: Avoid build splat for syscall numbers with uclibc
perf tools: Elide strlcpy warning with uclibc
perf tools: Fix statfs.f_type data type mismatch build error with uclibc
tools: Remove bitops/hweight usage of bits in tools/perf
perf machine: Fix __machine__findnew_thread() error path
perf tools: Fix building error in x86_64 when dwarf unwind is on
perf probe: Propagate error code when write(2) failed
perf/x86/intel: Fix bug for "cycles:p" and "cycles:pp" on SLM
perf/rapl: Fix sysfs_show() initialization for RAPL PMU
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git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/urgent
Pull perf/urgent fixes from Arnaldo Carvalho de Melo:
- Fix segfault when using both the map symtab viewer and annotation
in the TUI (Namhyung Kim).
- uClibc build fixes (Alexey Brodkin, Vineet Gupta).
- bitops/hweight were moved from tools/perf/ too tools/include, move
some leftovers (Arnaldo Carvalho de Melo)
- Fix dwarf unwind x86_64 build error (Namhyung Kim)
- Fix __machine__findnew_thread() error path (Namhyung Kim)
- Propagate error code when write(2) failed in 'perf probe' (Namhyung Kim)
- Use dwfl_report_elf() instead of offline in powerpc bits to
properly handle non prelinked DSOs (Sukadev Bhattiprolu).
- Fix dwarf unwind using libunwind in 'perf test' (Wang Nan)
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes
Merge "Samsung fixes for v3.19" from Kukjin Kim:
Samsung fixes for v3.19
- exynos_defconfig: enable LM90 driver and display panel support
- HWMON
- SENSORS_LM90
- Direct Rendering Manager (DRM)
- DRM bridge registration and lookup framework
- Parade ps8622/ps8625 eDP/LVDS bridge
- NXP ptn3460 eDP/LVDS bridge
- Exynos Fully Interactive Mobile Display controller (FIMD)
- Panel registration and lookup framework
- Simple panels
- Backlight & LCD device support
- use pmu_system_controller phandle for dp phy
: DP PHY requires pmu_system_controller to handle PMU reg. now
* tag 'samsung-fixes-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: exynos_defconfig: Enable LM90 driver
ARM: exynos_defconfig: Enable options for display panel support
arm: dts: Use pmu_system_controller phandle for dp phy
Signed-off-by: Olof Johansson <olof@lixom.net>
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