diff options
| author | Dilip Kota <c_dkota@codeaurora.org> | 2013-12-16 19:44:38 +0530 |
|---|---|---|
| committer | Naveen Kaje <nkaje@codeaurora.org> | 2014-03-17 16:42:05 -0600 |
| commit | 4d51a8bb3befed359a28e4fc22388a8a8e733b2d (patch) | |
| tree | 8223fd9323b3690063dd08291a06941f7c0a9114 /drivers/tty | |
| parent | 97d5ac8410be19d775b2f2e3104749b3344daeef (diff) | |
msm_serial_hs: Programming BCR Register
UART Core is showing inconsistent behaviour in firing
Stale Timeout Interrupt. Stale Timeout is not happening
at some points. After programming the BCR register the
Stale Timeout is happening as expected.
Also fix the BCR register offset to avoid instablilities when
console is disabled.
CRs-Fixed: 590176, 628523
Change-Id: I5a2522b87fe0951cad80e56f8f880c214d2d3bb5
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>
Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
Diffstat (limited to 'drivers/tty')
| -rw-r--r-- | drivers/tty/serial/msm_serial_hs.c | 7 | ||||
| -rw-r--r-- | drivers/tty/serial/msm_serial_hs_hwreg.h | 5 |
2 files changed, 11 insertions, 1 deletions
diff --git a/drivers/tty/serial/msm_serial_hs.c b/drivers/tty/serial/msm_serial_hs.c index 137ce93e6303..573f8e8a3353 100644 --- a/drivers/tty/serial/msm_serial_hs.c +++ b/drivers/tty/serial/msm_serial_hs.c @@ -320,6 +320,7 @@ unsigned int regmap_blsp[UART_DM_LAST] = { [UART_DM_TXFS] = 0x4c, [UART_DM_RXFS] = 0x50, [UART_DM_RX_TRANS_CTRL] = 0xcc, + [UART_DM_BCR] = 0xc8, }; static struct of_device_id msm_hs_match_table[] = { @@ -2678,7 +2679,11 @@ static int msm_hs_startup(struct uart_port *uport) } } - msm_hs_write(uport, UARTDM_BCR_ADDR, 0x003F); + data = (UARTDM_BCR_TX_BREAK_DISABLE | UARTDM_BCR_STALE_IRQ_EMPTY | + UARTDM_BCR_RX_DMRX_LOW_EN | UARTDM_BCR_RX_STAL_IRQ_DMRX_EQL | + UARTDM_BCR_RX_DMRX_1BYTE_RES_EN); + msm_hs_write(uport, UART_DM_BCR, data); + /* Set auto RFR Level */ data = msm_hs_read(uport, UART_DM_MR1); data &= ~UARTDM_MR1_AUTO_RFR_LEVEL1_BMSK; diff --git a/drivers/tty/serial/msm_serial_hs_hwreg.h b/drivers/tty/serial/msm_serial_hs_hwreg.h index d912b9f2a2a2..064bbda421df 100644 --- a/drivers/tty/serial/msm_serial_hs_hwreg.h +++ b/drivers/tty/serial/msm_serial_hs_hwreg.h @@ -81,6 +81,7 @@ enum msm_hs_regs { UART_DM_TXFS, UART_DM_RXFS, UART_DM_RX_TRANS_CTRL, + UART_DM_BCR, UART_DM_LAST, }; @@ -94,7 +95,11 @@ enum msm_hs_regs { * UARTDM Core v1.4 STALE_IRQ_EMPTY bit defination * Stale interrupt will fire if bit is set when RX-FIFO is empty */ +#define UARTDM_BCR_TX_BREAK_DISABLE 0x1 #define UARTDM_BCR_STALE_IRQ_EMPTY 0x2 +#define UARTDM_BCR_RX_DMRX_LOW_EN 0x4 +#define UARTDM_BCR_RX_STAL_IRQ_DMRX_EQL 0x10 +#define UARTDM_BCR_RX_DMRX_1BYTE_RES_EN 0x20 /* TRANSFER_CONTROL Register for UARTDM Core v1.4 */ #define UARTDM_RX_TRANS_CTRL_ADDR 0xcc |