diff options
| author | Larry Bassel <lbassel@codeaurora.org> | 2014-02-13 14:08:56 -0800 |
|---|---|---|
| committer | Larry Bassel <lbassel@codeaurora.org> | 2014-02-14 10:17:54 -0800 |
| commit | 4a29aa1a3781555b40b31dd6402b13e53d4fe5c8 (patch) | |
| tree | 545bc9904c983aca70e1672957a88d7014727788 /drivers/iommu | |
| parent | 16103798fc51bc48c2a37a263546d1a7433410fc (diff) | |
iommu: simplify calculation of prrr and nmrr on arm64
There is no need to use the mair0 and mair1 registers
to calculate the prrr and nmrr on arm64, the non-lpae arm32
value is always correct.
Change-Id: I22bf33cb2a4357252a655c56b23d47db42b40106
Signed-off-by: Larry Bassel <lbassel@codeaurora.org>
Diffstat (limited to 'drivers/iommu')
| -rw-r--r-- | drivers/iommu/msm_iommu.c | 38 |
1 files changed, 11 insertions, 27 deletions
diff --git a/drivers/iommu/msm_iommu.c b/drivers/iommu/msm_iommu.c index b0f36f401631..facd2baed1d2 100644 --- a/drivers/iommu/msm_iommu.c +++ b/drivers/iommu/msm_iommu.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2013, The Linux Foundation. All rights reserved. +/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -34,6 +34,14 @@ __asm__ __volatile__ ( \ #define RCP15_MAIR0(reg) MRC(reg, p15, 0, c10, c2, 0) #define RCP15_MAIR1(reg) MRC(reg, p15, 0, c10, c2, 1) +/* These values come from proc-v7-2level.S */ +#define PRRR_VALUE 0xff0a81a8 +#define NMRR_VALUE 0x40e040e0 + +/* These values come from proc-v7-3level.S */ +#define MAIR0_VALUE 0xeeaa4400 +#define MAIR1_VALUE 0xff000004 + static struct iommu_access_ops *iommu_access_ops; struct bus_type msm_iommu_sec_bus_type = { @@ -107,14 +115,6 @@ struct device *msm_iommu_get_ctx(const char *ctx_name) EXPORT_SYMBOL(msm_iommu_get_ctx); #ifdef CONFIG_ARM -/* These values come from proc-v7-2level.S */ -#define PRRR_VALUE 0xff0a81a8 -#define NMRR_VALUE 0x40e040e0 - -/* These values come from proc-v7-3level.S */ -#define MAIR0_VALUE 0xeeaa4400 -#define MAIR1_VALUE 0xff000004 - #ifdef CONFIG_IOMMU_LPAE #ifdef CONFIG_ARM_LPAE /* @@ -196,27 +196,11 @@ u32 msm_iommu_get_nmrr(void) #ifdef CONFIG_ARM64 u32 msm_iommu_get_prrr(void) { - unsigned int mair0; - u64 tmp; - - asm volatile( - " mrs %0, mair_el1\n" - : "=&r" (tmp)); - - mair0 = tmp & 0xffffffff; - return mair0; + return PRRR_VALUE; } u32 msm_iommu_get_nmrr(void) { - unsigned int mair1; - u64 tmp; - - asm volatile( - " mrs %0, mair_el1\n" - : "=&r" (tmp)); - - mair1 = tmp >> 32; - return mair1; + return NMRR_VALUE; } #endif |