diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2014-02-11 18:41:35 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-02-21 17:14:03 +0000 |
| commit | 8ceae4f6ad466e7907176741f456bd5db379622f (patch) | |
| tree | eb2dfc0130585bcc2be84078a2f4394e6aeafc79 | |
| parent | 01f79d3b2dfc565ea1da19996c6087f39b3ccbc1 (diff) | |
target-arm: Implement AArch64 MPIDR
Implement the AArch64 MPIDR system register.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
| -rw-r--r-- | target-arm/helper.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c index acdc1c3a5..067ea1970 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -1435,7 +1435,8 @@ static uint64_t mpidr_read(CPUARMState *env, const ARMCPRegInfo *ri) { CPUState *cs = CPU(arm_env_get_cpu(env)); uint32_t mpidr = cs->cpu_index; - /* We don't support setting cluster ID ([8..11]) + /* We don't support setting cluster ID ([8..11]) (known as Aff1 + * in later ARM ARM versions), or any of the higher affinity level fields, * so these bits always RAZ. */ if (arm_feature(env, ARM_FEATURE_V7MP)) { @@ -1450,7 +1451,8 @@ static uint64_t mpidr_read(CPUARMState *env, const ARMCPRegInfo *ri) } static const ARMCPRegInfo mpidr_cp_reginfo[] = { - { .name = "MPIDR", .cp = 15, .crn = 0, .crm = 0, .opc1 = 0, .opc2 = 5, + { .name = "MPIDR", .state = ARM_CP_STATE_BOTH, + .opc0 = 3, .crn = 0, .crm = 0, .opc1 = 0, .opc2 = 5, .access = PL1_R, .readfn = mpidr_read, .type = ARM_CP_NO_MIGRATE }, REGINFO_SENTINEL }; |