diff options
| author | Brian Masney <masneyb@onstation.org> | 2018-09-25 06:46:51 -0400 |
|---|---|---|
| committer | Amit Pundir <amit.pundir@linaro.org> | 2019-01-11 21:12:12 +0530 |
| commit | ff76a536e19dc4d04adeca7a14b68f837993b89f (patch) | |
| tree | 83c70c9f7df5598f256d3b796aae527bb6212e7f | |
| parent | 1ddcf6af355726a167cbb96781dd43db6474fbd7 (diff) | |
ARM: dts: qcom-msm8974: change invalid flag IRQ NONE to valid value
The following commits used IRQ_TYPE_NONE since that matched what was
already in the file and I do not have access to the datasheets for
these devices. After these patches were submitted, commit dcf145011400
("ARM: dts: qcom-msm8974: change invalid flag IRQ NONE to valid value")
changed all of these values to IRQ_TYPE_LEVEL_HIGH. This patch corrects
the IRQ type for these two commits:
commit bd9392507588 ("ARM: dts: qcom: msm8974-hammerhead: add device
tree bindings for ALS / proximity")
commit fe8d81fe7d9a ("ARM: dts: qcom: msm8974-hammerhead: add device
tree bindings for mpu6515")
Prior to these patches, I was having issues with the bmp280 sensor
returning temperature / pressure skipped errors, however these errors
have gone away with these patches.
Patches were tested on a LG Nexus 5 (hammerhead) phone.
Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
| -rw-r--r-- | arch/arm/boot/dts/qcom-msm8974.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 84e1fee1bf1a..a808973f9dc7 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -719,7 +719,7 @@ status = "disabled"; compatible = "qcom,i2c-qup-v2.1.1"; reg = <0xf9925000 0x1000>; - interrupts = <0 97 IRQ_TYPE_NONE>; + interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; #address-cells = <1>; @@ -754,7 +754,7 @@ status = "disabled"; compatible = "qcom,i2c-qup-v2.1.1"; reg = <0xf9968000 0x1000>; - interrupts = <0 106 IRQ_TYPE_NONE>; + interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gcc GCC_BLSP2_QUP6_I2C_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>; clock-names = "core", "iface"; #address-cells = <1>; |