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AgeCommit message (Expand)Author
2021-05-20target/xtensa: clean up unaligned accessMax Filippov
2021-05-20target/xtensa: fix access ring in l32exMax Filippov
2021-05-20target/xtensa: don't generate extra EXCP_DEBUG on exceptionMax Filippov
2021-05-20target/xtensa: Make sure that tb->size != 0Ilya Leoshkevich
2021-05-02Do not include exec/address-spaces.h if it's not really necessaryThomas Huth
2021-04-03target/xtensa: make xtensa_modules static on importMax Filippov
2021-04-03target/xtensa: fix meson.build rule for xtensa coresMax Filippov
2021-03-10semihosting: Move include/hw/semihosting/ -> include/semihosting/Philippe Mathieu-Daudé
2021-02-05cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClassClaudio Fontana
2021-02-05cpu: move do_unaligned_access to tcg_opsClaudio Fontana
2021-02-05cpu: move cc->transaction_failed to tcg_opsClaudio Fontana
2021-02-05cpu: move cc->do_interrupt to tcg_opsClaudio Fontana
2021-02-05cpu: Move debug_excp_handler to tcg_opsEduardo Habkost
2021-02-05cpu: Move tlb_fill to tcg_opsEduardo Habkost
2021-02-05cpu: Move cpu_exec_* to tcg_opsEduardo Habkost
2021-02-05cpu: Introduce TCGCpuOperations structEduardo Habkost
2020-11-15xtensa tcg cpus: Fix Lesser GPL version numberChetan Pant
2020-11-13hmp: Pass monitor to mon_get_cpu_env()Kevin Wolf
2020-10-26target/xtensa: enable all coprocessors for linux-userMax Filippov
2020-09-23qemu/atomic.h: rename atomic_ to qatomic_Stefan Hajnoczi
2020-09-18qom: Remove module_obj_name parameter from OBJECT_DECLARE* macrosEduardo Habkost
2020-09-09Use OBJECT_DECLARE_TYPE where possibleEduardo Habkost
2020-09-09Use DECLARE_*CHECKER* macrosEduardo Habkost
2020-09-09Move QOM typedefs and add missing includesEduardo Habkost
2020-08-21target/xtensa: import DSP3400 coreMax Filippov
2020-08-21target/xtensa: import de233_fpu coreMax Filippov
2020-08-21target/xtensa: implement FPU division and square rootMax Filippov
2020-08-21target/xtensa: add DFPU registers and opcodesMax Filippov
2020-08-21target/xtensa: add DFPU optionMax Filippov
2020-08-21target/xtensa: don't access BR regfile directlyMax Filippov
2020-08-21target/xtensa: move FSR/FCR register accessorsMax Filippov
2020-08-21target/xtensa: rename FPU2000 translators and helpersMax Filippov
2020-08-21target/xtensa: support copying registers up to 64 bits wideMax Filippov
2020-08-21target/xtensa: add geometry to xtensa_get_regfile_by_nameMax Filippov
2020-08-21target/xtensa: implement NMI supportMax Filippov
2020-08-21target/xtensa: make opcode properties more dynamicMax Filippov
2020-08-21meson: targetPaolo Bonzini
2020-08-21meson: rename included C source files to .c.incPaolo Bonzini
2020-06-25Merge remote-tracking branch 'remotes/xtensa/tags/20200625-xtensa' into stagingPeter Maydell
2020-06-22target/xtensa: drop gen_io_end callMax Filippov
2020-05-19softfloat: Name compare relation enumRichard Henderson
2020-05-17target/xtensa: fix simcall for newer hardwareMax Filippov
2020-05-17target/xtensa: fetch HW version from configuration overlayMax Filippov
2020-04-30target/xtensa: work around missing SR definitionsMax Filippov
2020-04-15gdbstub: Do not use memset() on GByteArrayPhilippe Mathieu-Daudé
2020-04-07target/xtensa: statically allocate xtensa_insnbufs in DisasContextMax Filippov
2020-04-07target/xtensa: fix pasto in pfwait.r opcode nameMax Filippov
2020-04-07target/xtensa: add FIXME for translation memory leakAlex Bennée
2020-03-19Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...Peter Maydell
2020-03-17cpu: Use DeviceClass reset instead of a special CPUClass resetPeter Maydell