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path: root/hw/intc/sifive_plic.c
AgeCommit message (Expand)Author
2023-01-06hw/intc: sifive_plic: Fix the pending register range checkBin Meng
2023-01-06hw/intc: sifive_plic: Change "priority-base" to start from interrupt source 0Bin Meng
2023-01-06hw/intc: sifive_plic: Update "num-sources" property default valueBin Meng
2023-01-06hw/intc: sifive_plic: Use error_setg() to propagate the error up via errp in ...Bin Meng
2023-01-06hw/intc: sifive_plic: Improve robustness of the PLIC config parserBin Meng
2023-01-06hw/intc: sifive_plic: Drop PLICMode_HBin Meng
2023-01-06hw/intc: sifive_plic: fix out-of-bound access of source_priority arrayJim Shu
2023-01-06hw/intc: sifive_plic: Renumber the S irqs for numa supportFrédéric Pétrot
2022-10-14hw/intc: sifive_plic: change interrupt priority register to WARL fieldJim Shu
2022-10-14hw/intc: sifive_plic: fix hard-coded max priority levelJim Shu
2022-07-28hw/intc: sifive_plic: Fix multi-socket plic configuraitonAtish Patra
2022-06-10hw/intc: sifive_plic: Avoid overflowing the addr_config bufferAlistair Francis
2022-01-21target/riscv: Support start kernel directly by KVMYifei Jiang
2022-01-08hw/intc: sifive_plic: Cleanup remaining functionsAlistair Francis
2022-01-08hw/intc: sifive_plic: Cleanup the read functionAlistair Francis
2022-01-08hw/intc: sifive_plic: Cleanup the write functionAlistair Francis
2022-01-08hw/intc: sifive_plic: Add a reset functionAlistair Francis
2021-10-22hw/intc: sifive_plic: Cleanup the irq_request functionAlistair Francis
2021-10-22hw/intc: sifive_plic: Cleanup the realize functionAlistair Francis
2021-10-22hw/intc: sifive_plic: Move the propertiesAlistair Francis
2021-09-21hw/intc: sifive_plic: Convert the PLIC to use RISC-V CPU GPIO linesAlistair Francis
2021-05-02Do not include hw/boards.h if it's not really necessaryThomas Huth
2021-05-02Do not include sysemu/sysemu.h if it's not really necessaryThomas Huth
2020-11-03target/riscv: Add sifive_plic vmstateYifei Jiang
2020-09-23qemu/atomic.h: rename atomic_ to qatomic_Stefan Hajnoczi
2020-09-09hw/riscv: Move sifive_plic model to hw/intcBin Meng