aboutsummaryrefslogtreecommitdiff
path: root/target/arm/translate.c
diff options
context:
space:
mode:
authorRichard Henderson <richard.henderson@linaro.org>2018-10-24 07:50:20 +0100
committerPeter Maydell <peter.maydell@linaro.org>2018-10-24 07:51:37 +0100
commite23f12b3a252352b575908ca7b94587acd004641 (patch)
treeb52e6721209438003e848f8745524fbb5ecadfee /target/arm/translate.c
parentac55d00709e78cd39dfa298dcaac7aecb58762e8 (diff)
target/arm: Promote consecutive memory ops for aa32
For a sequence of loads or stores from a single register, little-endian operations can be promoted to an 8-byte op. This can reduce the number of operations by a factor of 8. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20181011205206.3552-20-richard.henderson@linaro.org Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate.c')
-rw-r--r--target/arm/translate.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 7f209b4ae2..83e8824208 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -5011,6 +5011,16 @@ static int disas_neon_ls_insn(DisasContext *s, uint32_t insn)
if (size == 3 && (interleave | spacing) != 1) {
return 1;
}
+ /* For our purposes, bytes are always little-endian. */
+ if (size == 0) {
+ endian = MO_LE;
+ }
+ /* Consecutive little-endian elements from a single register
+ * can be promoted to a larger little-endian operation.
+ */
+ if (interleave == 1 && endian == MO_LE) {
+ size = 3;
+ }
tmp64 = tcg_temp_new_i64();
addr = tcg_temp_new_i32();
tmp2 = tcg_const_i32(1 << size);