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authorRichard Henderson <richard.henderson@linaro.org>2019-09-04 12:30:25 -0700
committerPeter Maydell <peter.maydell@linaro.org>2019-09-05 13:23:03 +0100
commit519b84711ea36bb8a339096e207b6b9b65cd2051 (patch)
tree2564def569b4116fe3292dc286e41e547d1aec97 /target/arm/a32-uncond.decode
parent885782a78c6d05932c5d8f463dc50fc8312e3eb9 (diff)
target/arm: Convert Clear-Exclusive, Barriers
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190904193059.26202-36-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/a32-uncond.decode')
-rw-r--r--target/arm/a32-uncond.decode10
1 files changed, 10 insertions, 0 deletions
diff --git a/target/arm/a32-uncond.decode b/target/arm/a32-uncond.decode
index 64548a93e2..c7e9df8030 100644
--- a/target/arm/a32-uncond.decode
+++ b/target/arm/a32-uncond.decode
@@ -22,6 +22,7 @@
# All of those that have a COND field in insn[31:28] are in a32.decode
#
+&empty !extern
&i !extern imm
# Branch with Link and Exchange
@@ -37,3 +38,12 @@ BLX_i 1111 101 . ........................ &i imm=%imm24h
RFE 1111 100 pu:2 0 w:1 1 rn:4 0000 1010 0000 0000 &rfe
SRS 1111 100 pu:2 1 w:1 0 1101 0000 0101 000 mode:5 &srs
+
+# Clear-Exclusive, Barriers
+
+# QEMU does not require the option field for the barriers.
+CLREX 1111 0101 0111 1111 1111 0000 0001 1111
+DSB 1111 0101 0111 1111 1111 0000 0100 ----
+DMB 1111 0101 0111 1111 1111 0000 0101 ----
+ISB 1111 0101 0111 1111 1111 0000 0110 ----
+SB 1111 0101 0111 1111 1111 0000 0111 0000