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authorblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2008-12-23 08:47:26 +0000
committerblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2008-12-23 08:47:26 +0000
commit8fa211e881ff386f8555c113b409aa3373dca7e1 (patch)
tree05c46b1f8f2d1822fa0457a2e37bf2ae239db1e4 /target-sparc
parent69dd5c9ffd5c0c6a01ad14b9c6a8d7135ccc2b9a (diff)
Implement tick interrupt disable bits
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6122 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sparc')
-rw-r--r--target-sparc/cpu.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 93c1be59fd..905cf16b22 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -330,7 +330,8 @@ typedef struct CPUSPARCState {
uint64_t hpstate, htstate[MAXTL_MAX], hintp, htba, hver, hstick_cmpr, ssr;
void *hstick; // UA 2005
uint32_t softint;
-#define SOFTINT_TIMER 1
+#define SOFTINT_TIMER 1
+#define SOFTINT_STIMER (1 << 16)
#endif
sparc_def_t *def;
} CPUSPARCState;