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authorMichael Tokarev <mjt@tls.msk.ru>2023-07-14 14:23:51 +0300
committerMichael Tokarev <mjt@tls.msk.ru>2023-07-25 17:14:07 +0300
commit8b81968c1cf351430dad66a1b36420f431243842 (patch)
tree1ba710e8ade4b755d15bd89b8157c0d8cd4d9b01 /hw/sparc
parent673d8215415dc0c13e96b8d757102d942916d1b2 (diff)
other architectures: spelling fixes
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/sparc')
-rw-r--r--hw/sparc/sun4m_iommu.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/hw/sparc/sun4m_iommu.c b/hw/sparc/sun4m_iommu.c
index 71f5465249..eb40f9377c 100644
--- a/hw/sparc/sun4m_iommu.c
+++ b/hw/sparc/sun4m_iommu.c
@@ -96,10 +96,10 @@
#define IOMMU_AER_SBW 0x80000000 /* S-to-M asynchronous writes */
#define IOMMU_AER_MASK 0x801f000f
-#define IOMMU_SBCFG0 (0x1010 >> 2) /* SBUS configration per-slot */
-#define IOMMU_SBCFG1 (0x1014 >> 2) /* SBUS configration per-slot */
-#define IOMMU_SBCFG2 (0x1018 >> 2) /* SBUS configration per-slot */
-#define IOMMU_SBCFG3 (0x101c >> 2) /* SBUS configration per-slot */
+#define IOMMU_SBCFG0 (0x1010 >> 2) /* SBUS configuration per-slot */
+#define IOMMU_SBCFG1 (0x1014 >> 2) /* SBUS configuration per-slot */
+#define IOMMU_SBCFG2 (0x1018 >> 2) /* SBUS configuration per-slot */
+#define IOMMU_SBCFG3 (0x101c >> 2) /* SBUS configuration per-slot */
#define IOMMU_SBCFG_SAB30 0x00010000 /* Phys-address bit 30 when
bypass enabled */
#define IOMMU_SBCFG_BA16 0x00000004 /* Slave supports 16 byte bursts */