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authorPeter Maydell <peter.maydell@linaro.org>2020-01-27 09:44:03 +0000
committerPeter Maydell <peter.maydell@linaro.org>2020-01-27 09:44:04 +0000
commit760df0d121a836dcbf3726b80b820115aef21b30 (patch)
tree6c45419b94179514c09b0270ed31326fe83f874b /docs/specs
parentba2ed84fe6a78f64b2da441750fc6e925d94106a (diff)
parentdb5adeaa84d0d70dabd41500e72493fec04408ac (diff)
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
* Register qdev properties as class properties (Marc-André) * Cleanups (Philippe) * virtio-scsi fix (Pan Nengyuan) * Tweak Skylake-v3 model id (Kashyap) * x86 UCODE_REV support and nested live migration fix (myself) * Advisory mode for pvpanic (Zhenwei) # gpg: Signature made Fri 24 Jan 2020 20:16:23 GMT # gpg: using RSA key BFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (58 commits) build-sys: clean up flags included in the linker command line target/i386: Add the 'model-id' for Skylake -v3 CPU models qdev: use object_property_help() qapi/qmp: add ObjectPropertyInfo.default-value qom: introduce object_property_help() qom: simplify qmp_device_list_properties() vl: print default value in object help qdev: register properties as class properties qdev: move instance properties to class properties qdev: rename DeviceClass.props qdev: set properties with device_class_set_props() object: return self in object_ref() object: release all props object: add object_class_property_add_link() object: express const link with link property object: add direct link flag object: rename link "child" to "target" object: check strong flag with & object: do not free class properties object: add object_property_set_default ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'docs/specs')
-rw-r--r--docs/specs/pvpanic.txt18
1 files changed, 11 insertions, 7 deletions
diff --git a/docs/specs/pvpanic.txt b/docs/specs/pvpanic.txt
index c7bbacc778..a90fbca72b 100644
--- a/docs/specs/pvpanic.txt
+++ b/docs/specs/pvpanic.txt
@@ -16,8 +16,13 @@ pvpanic exposes a single I/O port, by default 0x505. On read, the bits
recognized by the device are set. Software should ignore bits it doesn't
recognize. On write, the bits not recognized by the device are ignored.
Software should set only bits both itself and the device recognize.
-Currently, only bit 0 is recognized, setting it indicates a guest panic
-has happened.
+
+Bit Definition
+--------------
+bit 0: a guest panic has happened and should be processed by the host
+bit 1: a guest panic has happened and will be handled by the guest;
+ the host should record it or report it, but should not affect
+ the execution of the guest.
ACPI Interface
--------------
@@ -26,13 +31,12 @@ pvpanic device is defined with ACPI ID "QEMU0001". Custom methods:
RDPT: To determine whether guest panic notification is supported.
Arguments: None
-Return: Returns a byte, bit 0 set to indicate guest panic
- notification is supported. Other bits are reserved and
- should be ignored.
+Return: Returns a byte, with the same semantics as the I/O port
+ interface.
WRPT: To send a guest panic event
-Arguments: Arg0 is a byte, with bit 0 set to indicate guest panic has
- happened. Other bits are reserved and should be cleared.
+Arguments: Arg0 is a byte to be written, with the same semantics as
+ the I/O interface.
Return: None
The ACPI device will automatically refer to the right port in case it