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authorAndreas Fritiofson <andreas.fritiofson@gmail.com>2012-07-11 16:23:48 +0200
committerFreddie Chopin <freddie.chopin@gmail.com>2012-07-30 06:14:16 +0000
commit0900d5a3cd956d9a5aa6b4ecfe722bcce4831f32 (patch)
treeaf784df340bb317eebba87eab20c6daf1b0419b3 /contrib
parent8cf671ea7be52096a629f08bd59492275bd3dcfb (diff)
flash: don't write to FLASH_CR in stm32x_write_block
It's unnecessary and prevents reusing this function to fix option byte writes. Also try to disable flash writing after an error. Change-Id: Ib5a7b768a1523e6b8da1555126fef4c1e60ab083 Signed-off-by: Szymon Modzelewski <szmodzelewski@gmail.com> Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/479 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'contrib')
-rw-r--r--contrib/loaders/flash/stm32f1x.S3
1 files changed, 0 insertions, 3 deletions
diff --git a/contrib/loaders/flash/stm32f1x.S b/contrib/loaders/flash/stm32f1x.S
index e83d8c13..6b6aa091 100644
--- a/contrib/loaders/flash/stm32f1x.S
+++ b/contrib/loaders/flash/stm32f1x.S
@@ -37,7 +37,6 @@
* r7 - tmp
*/
-#define STM32_FLASH_CR_OFFSET 0x10 /* offset of CR register from flash reg base */
#define STM32_FLASH_SR_OFFSET 0x0c /* offset of SR register from flash reg base */
wait_fifo:
@@ -47,8 +46,6 @@ wait_fifo:
ldr r5, [r2, #4] /* read rp */
cmp r5, r6 /* wait until rp != wp */
beq wait_fifo
- movs r6, #1 /* set PG flag to enable flash programming */
- str r6, [r0, #STM32_FLASH_CR_OFFSET]
ldrh r6, [r5] /* "*target_address++ = *rp++" */
strh r6, [r4]
adds r5, #2